This message is from the T13 list server.
On Mon, 8 Apr 2002 17:17:58 -0700, McGrath, Jim wrote: >This message is from the T13 list server. >You have to allow for multiple bursts of DMA. There are lots of good >reasons for this, but the real reason is that the host has to be able to >terminate the burst whenever host side software wants to take a look at the >ATA bus. >Think about it. You cannot read STATUS and do a DMA burst at the same time. >So whenever the host tries to do a PIO operation (under the control of host >software), either the host hardware has to make up the returned data >(obviously not very good) or terminate the DMA burst. Ahhh... (Thanks Jim!) Here we have another of those stupid things that our stupid ATA host adapters do. Yes, if the host software attempts to write to a device register, especially the DevCtrl register or write 0x08 into the Command register, the host MUST terminate the current DMA burst and make that write happen on the ATA interface. ANY other write can be ignored (because it is a malfunction of the host software). HOWEVER, there has NEVER been a valid reason to terminate a DMA burst because the host is reading a register (ANY register!) during a DMA burst. The fact that ATA host adapters terminate the current DMA burst in order to allow the read to happen is just plain dumb. Why is it dumb? Because all the host adapter needs to do is respond with data of 80H to ANY read of ANY register during a DMA burst. There is no reason to terminate the DMA burst in order to give the host this fake "busy" status (BSY=1, remember that reading any register while BSY=1 is a special case where the data returned by the device is 80H (or or correctly 1xxxxxxxB, see the I/O response tables). *** Hale Landis *** www.ata-atapi.com ***
