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Yes, the ATA interface is indeed returned to the "PIO State" whenever the device registers are accessed. Because the (intel) host adapter does not make any assumption on what the status or any other register should be during a UDMA burst, it always runs the "PIO" cycle to the device. T.E. -----Original Message----- From: Hale Landis [mailto:[EMAIL PROTECTED]] Sent: Tuesday, April 09, 2002 2:20 PM To: [EMAIL PROTECTED] Subject: Re: RE: [t13] UDMA Bursts - Pause versus Termination <...> Termination is required for reasons other than slowing down the data transfer rate or reaching the end of a command execution. As described in my previous email, there are times when PIO activities may be required during a DMA data transfer command and that requires that the ATA interface be returned to the "PIO" state and that requires the current DMA data burst be terminated. Any host adapter folks care to comment on my previous email about this? *** Hale Landis *** www.ata-atapi.com ***
