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I recieved this question in a private email but the answer is something everyone interested in this should see... >Just one comment to 4). "must if you want to use DMA" is a strong >phrase here. What about polling the drive's alternate status register >or polling the bus master's status register? I would not recommend it. >But HBAs should be able to handle that. Yes, they should, and all Intel ICHx controllers do operate correctly and as expected if you do this. However, there are several very popular brands of controllers on the market now that can not support this. These controllers will a) corrupt the device status data, b) corrupt the actual data transfer and/or c) hang the controller hardware such that power off is required. But even on an Intel ICHx you must be careful and not set the BMIDE Start/Stop bit to 0 (Stop) too early - for example, before the controller is done sending all the data to the system memory at the end of an ATA READ DMA command. A 0 in the BMIDE Active bit doesn't always mean all the data movement is done, it only means the controller fetched the last PRD in the PRD list, the data for that PRD may not be moved yet. This is one of the areas of the old SFF-8038 and now T13 1510 document that is very much lacking in detail. The result is a wide variety of implementations. The problem has always been that the BMIDE status is really not very good. We really need something like this instead: * Running - set to 1 when the Start bit is set to 1, set to 0 when INTRQ is seen from device AND all data movement is done. * LastTransfer - 1 when last data word for last PRD sent to device or last data word for last PRD sent to system memory. * IRQasserted - 1 when interrupt asserted to system interrupt controller, can not be 1 until Running is 0. Host writes 1 to this bit to acknowledge the controller's interrupt. * Plus the Error bit with a better definition of what it means. Compare these descriptions to the 1510 descriptions of Active and Interrupt. Active is basically useless. Interrupt is "OK" but could be better described - for example, Interrupt is not the same as the device's INTRQ signal state but that is not clearly described in 1510. Hale *** Hale Landis *** www.ata-atapi.com ***
