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<snip> >The worst idea is to bugcheck just because the BAR's are programmed and >the controller is set for legacy operation. PCI enumerators have no >idea that we're legacy when it sees BAR's to fill out, so it just fills >them out. A question that should be asked of the PCI bus designers is this: Why is a controller allowed to use system resources with having those resources described in the PCI config space? Why does an ATA controller in legacy mode show "zero" in the BAR locations? This is really stupid - how can this be called "plug and play"? ----------------------------------------------------------------------- [MarkOv] Hence the push for native mode. Legacy mode still exists because certain markets insist on running less-than-modern operating systems that don't understand that your storage controller doesn't have to respond to accesses at legacy addresses. Those legacy addresses when allocated on the boundaries required by PCI can cause conflicts with other older legacy ISA devices that still exist (in one form or another) today. Now if we could just get everyone to get on board with legacy-free .... Okay, I'm done laughing at myself now.
