At 17:01 23.05.01 -0400, you wrote:
>Does anyone know how to or if it is possible to assign clearance
>requirements as well as width settings in the layout directives in
>schematic? I have a whole sheet of signals that need special clearances and
>the only way I can see in establishing this is to manually set up a PCB
>design rule for each net on the sheet. Tedium at its worst. Any ideas?
Group those signals with a bus.
Generate a net class of all busses with the syncronizer
Generate your design rules with a net class.
If you can't draw a bus, give those signals net names witch can be
alphabetically grouped togheter and generate your net class manually.
Edi
>Lloyd Good
>Engineering Systems Co-ordinator
>GE Harris Energy Control Systems Canada Inc.
>2728 Hopewell Place NE
>Calgary, AB, Canada T1Y 7J7
>* +1 (403) 214-4777
>* +1 (403) 287-7946
* * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
* To post a message: mailto:[EMAIL PROTECTED]
*
* To leave this list visit:
* http://www.techservinc.com/protelusers/subscrib.html
* - or email -
* mailto:[EMAIL PROTECTED]?body=leave%20proteledaforum
*
* Contact the list manager:
* mailto:[EMAIL PROTECTED]
*
* Browse or Search previous postings:
* http://www.mail-archive.com/[email protected]
* * * * * * * * * * * * * * * * * * * * * * * * * * * * * *