At 12:04 PM 6/21/01 -0500, David Cary wrote:
>I'm reading
> http://4pcb.com/capabilities.htm
>and it claims that inner-layer clearances must be at least 15 mil
>while outer-layer clearances must be at least 7 mil.
>
>How to I set Design Rules in the PWB editor to enforce this ? (or a slightly
>more conservative 16 and 8) ?
>
>I haven't had any coffee yet today, so I'm probably missing something really
>simple ...
Drink your coffee first, and look again at that URL. Their trace/space
capabilities are based on what thickness copper you are using on the layer,
which is because thinner copper is easier to etch with precision. For
half-ounce copper, they specify 5/5.
They only do half ounce copper on prototype inner layers. On outer layers
they specify 1 ounce copper. That must refer to the raw material, not to
the finished board, which will have been plated up, probably by 1 ounce.
For outer layers they also specify 5/5. Note that these are their prototype
*limits*, not their standard production. Pushing the limits may be expensive.
When they are referring to "inner layer clearances," this has to do with
clearances, which they will swell to 15 mils if the gerbers come to them
with less. This is not trace-trace clearance; rather it is inner (negative)
plane radial blowout. You set this in Protel with a design rule in the
manufacturing section for inner plane clearance. I think the default is 20
mils.
They have an inner-layer feature-to-drill tolerance on protos of 0.012.
They require an annular ring of .006. With a 5 mil clearance minimum, one
could get a drill wandering onto a passing trace, theoretically. But that
would require the extreme allowed error. This is complicated by the fact
that holes are drilled oversize to compensate for the hole plating, and
annular ring normally refers to finished ring.
It might seem that the same argument would apply to traces passing by a via
on an inner layer. However, if the drill wanders 12 mils with a via, it is
less likely to cause a short than it would be on a negative plane, where
the clearance is typically at the minimum *everywhere*, since it is usually
generated that way.
[EMAIL PROTECTED]
Abdulrahman Lomax
P.O. Box 690
El Verano, CA 95433
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