Jonas Maebe wrote:
You can give S1, S3, S5 etc different super register numbers (> $1F,
so they don't conflict with the super register numbers for D0..D31).
As long as you don't change the code in
tarmcgarm/Tthumb2cgarm.init_register_allocators() to explicitly tell
the register allocator that it can use these "extra" registers, it
will won't try to allocate them.
So I change "S1,$04,$06,$00,s1,0,0" to "S1,$04,$06,$20,s1,0,0" and so-on
in compiler/arm/armreg.dat right?
After doing that do I need to do anything to update the generated files
or will they be updated automatically?
Make sure to adjust first_mm_imreg in arm/cpubase.pas afterwards (add
$10 to it, since the numbers $20..$3F will now be used by S1, S3 etc).
Ok
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