Why not ask the CPU to do the rounding? This is what Intel offers in
volume 1 of the Intel ® 64 and IA-32 Architectures Software Developer's
Manual:
4.8.4.1
Rounding Control (RC) Fields
In the Intel 64 and IA-32 architectures, the rounding mode is controlled
by a 2-bit rounding-control (RC) field
(Table 4-8 shows the encoding of this field). The RC field is
implemented in two different locations:
•
x87 FPU control register (bits 10 and 11)
•
The MXCSR register (bits 13 and 14)
Although these two RC fields perform the same function, they control
rounding for different execution environ-
ments within the processor. The RC field in the x87 FPU control register
controls rounding for computations
performed with the x87 FPU instructions; the RC field in the MXCSR
register controls rounding for SIMD floating-
point computations performed with the SSE/SSE2 instructions./
/
Do you want more?
Wolf
On 13/06/2018 09:58, Klaus Hartnegg wrote:
Am 12.06.2018 um 23:24 schrieb Jonas Maebe:
On 12/06/18 23:12, Klaus Hartnegg wrote:
This behaviour does have advantages in the special case of adding up
many rounded numbers, but it ruins the graphics output of my
software. It should at least be configurable. And in {$mode tp} it
should behave like Turbo Pascal, because that's what this mode is
made for.
The basic issue is that FPC doesn't support the 6 byte real type used
by TP in {$n-}, nor the associated behaviours such as rounding,
range/precision cut-offs etc. FPC indeed can only support TP {$n+}
mode compatibility at this time (and even that is not always exact,
as it depends on the FPU precision support by the hardware and OS).
Nevertheless it could offer an option to use the other rounding method.
Yes, there would still be deviations in some math results, because of
the different precision. But these deviations are much smaller than
those from the other rounding method.
Klaus
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