On 2001-Feb-08 22:21:32 +0100, Bernd Walter <[EMAIL PROTECTED]> wrote:
>On sparcv8 you don't have an operation doing conditionaly stores and
>you don't have RMW operations.
>The only way to do is to have a global lock variable on which you spin
>until the current client finishes.

The SPARC architecture supports SMP so there must be some
synchronisation primitive that works between processors (disabling
interrupts only works on the current processor).  Normally the same
primitive can be used to synchronise accesses within the same
processor.  I know the older SPARC's had a test-and-set instruction
which was locked RMW - there must be something similar in v8 and v9.


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