:In article <[EMAIL PROTECTED]>,
:Mike Smith <[EMAIL PROTECTED]> wrote:
:>
:> It looks about right, but page colouring is pointless unless and until we
:> can determine the processor cache characteristics at runtime.
:>
:> Which we can't.
:
:Why can't we do this at least on the i386 with the CPUID instruction,
:initial %eax == 2? It returns cache size, associativity, and line
:size for both the L1 and L2 caches. As far as I can tell, it works
:for the Pentium Pro and subsequent processors.
:
:John
:--
: John Polstra [EMAIL PROTECTED]
Well, first of all the page coloring is not pointless with the
sizes hardwired. The cache characteristics do not have to
match exactly for page coloring to work. The effectiveness is
like a log-graph, and you don't lose a lot by guessing wrong.
Once you get past a designated cache size of 4-pages or so you've
already reaped 90% of the benefit on systems which use N-way (2, 4, 8)
associative caches (which is most systems these days). For systems with
direct-mapped caches you reap 90% of the benefits once you get past
16 pages or so.
Since most L1 caches these days are at least 16K and most L2 caches
these days are at least 64K (and often much higher, such as on the IA32),
our hardwired page coloring constants wind up being about 95% effective
across the entire range of chips our OS currently runs on.
-Matt
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