On Dec 19, 2012, at 1:26 AM, Hans Petter Selasky wrote:

> On Tuesday 18 December 2012 21:32:46 Warner Losh wrote:
>> On Dec 18, 2012, at 12:44 PM, Hans Petter Selasky wrote:
>>> On Tuesday 18 December 2012 20:12:29 Andrew Turner wrote:
>>>> On Tue, 18 Dec 2012 13:06:44 +0100
>>>> Hans Petter Selasky <hsela...@c2i.net> wrote:
>>>>> Hi Andrew,
>>>>>> The BUS_DMA_COHERENT flag does nothing on armv6 as we need the cache
>>>>>> enabled for atomic operations to work correctly and we would have to
>>>>>> disable the cache on the entire page. This is acceptable behaviour
>>>>>> from the description of the flag in the busdma man page.
>>>>> Yes, but when I allocate memory from the USB stack, then I want that
>>>>> memory to not be cached. It is simply not that useful to have that
>>>>> memory cached. I didn't check the latest state of busdma, but if I'm
>>>>> not mistaken, if the BUS_DMA_COHERENT flag is set on the DMA tag, the
>>>>> flush/invalidate will simply return and do nothing. Maybe that is the
>>>>> problem ...
>>>> The exact meaning of BUS_DMA_COHERENT depends on the architecture. The
>>>> code is still required to call bus_dmamap_sync with a coherent map but
>>>> when the flag is implemented the cost of the operation will be reduced.
>>>> It doesn't guarantee the memory is uncached, it may be implemented that
>>>> way but the USB code can't rely on it.
>>>> Andrew
>>> The USB code doesn't rely on this flag. I'm wondering if BUSDMA by
>>> accident sets this flag, so that the cache sync ops are not called.
>> No. It doesn't.
> Hi,
>> Does the USB code still touch bytes in the same cache line while the DMA is
>> still outstanding?
> Yes, only for data. The busdma API must handle this case properly as 
> discussed 
> before.

No, it mustn't. It can't. The hardware is such that it is impossible to do 
this, as discussed before. You can't mix access to memory in the same cache 
line between host and DMA.

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