On 30/10/15 15:53, Hans Petter Selasky wrote:
On 10/30/15 14:38, Sebastian Huber wrote:
Tested on an Altera Cyclone V development kit.  Here the controller has
16 host channels.  This change significantly reduced the time spent in
the dwc_otg_interrupt_poll_locked() function.

Hi,

Thank you for your optimisation patch:

https://svnweb.freebsd.org/changeset/base/290195

Thanks.



How does the DWC OTG driver from FreeBSD work with your setup?

After an update of the USB stack from 9.3 to current it worked out of the box. Thanks a lot for your great USB stack!

It seems that this driver doesn't support DMA. I see a quite high CPU utilization in this area:

static void
dwc_otg_interrupt_poll_locked(struct dwc_otg_softc *sc)
{
[...]
        if (sc->sc_last_rx_status != 0) {
[...]
            temp = GRXSTSRD_BCNT_GET(
                sc->sc_last_rx_status);
            ep_no = GRXSTSRD_CHNUM_GET(
                sc->sc_last_rx_status);

            /* receive data, if any */
            if (temp != 0) {
                DPRINTF("Reading %d bytes from ep %d\n", temp, ep_no);
                bus_space_read_region_4(sc->sc_io_tag, sc->sc_io_hdl,
                    DOTG_DFIFO(ep_no),
                    sc->sc_rx_bounce_buffer, (temp + 3) / 4);
            }

--
Sebastian Huber, embedded brains GmbH

Address : Dornierstr. 4, D-82178 Puchheim, Germany
Phone   : +49 89 189 47 41-16
Fax     : +49 89 189 47 41-09
E-Mail  : sebastian.hu...@embedded-brains.de
PGP     : Public key available on request.

Diese Nachricht ist keine geschäftliche Mitteilung im Sinne des EHUG.

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