On 08/11/15 10:45, Hans Petter Selasky wrote:
On 11/02/15 13:41, Hans Petter Selasky wrote:
On 11/02/15 13:22, Sebastian Huber wrote:

On 30/10/15 15:53, Hans Petter Selasky wrote:
On 10/30/15 14:38, Sebastian Huber wrote:
Tested on an Altera Cyclone V development kit. Here the controller has 16 host channels. This change significantly reduced the time spent in
the dwc_otg_interrupt_poll_locked() function.


Thank you for your optimisation patch:


Hi Sebastian,

You maybe also want to port these two patches, and measure the CPU load again:


I didn't notice a big overall difference. Highest CPU load is now due to dwc_otg_read_fifo() instead of dwc_otg_interrupt_poll_locked().

Sebastian Huber, embedded brains GmbH

Address : Dornierstr. 4, D-82178 Puchheim, Germany
Phone   : +49 89 189 47 41-16
Fax     : +49 89 189 47 41-09
E-Mail  : sebastian.hu...@embedded-brains.de
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