On 4/4/2024 5:01 PM, Stephen Boyd wrote:
The register base that was used to write to the QSERDES_DP_PHY_MODE
register was 'dp_dp_phy' before commit 815891eee668 ("phy:
qcom-qmp-combo: Introduce orientation variable"). There isn't any
explanation in the commit why this is changed, so I suspect it was an
oversight or happened while being extracted from some other series.
Oddly the value being 0x4c or 0x5c doesn't seem to matter for me, so I
suspect this is dead code, but that can be fixed in another patch. It's
not good to write to the wrong register space, and maybe some other
version of this phy relies on this.
Cc: Douglas Anderson <diand...@chromium.org>
Cc: Abhinav Kumar <quic_abhin...@quicinc.com>
Cc: Dmitry Baryshkov <dmitry.barysh...@linaro.org>
Cc: Neil Armstrong <neil.armstr...@linaro.org>
Cc: Abel Vesa <abel.v...@linaro.org>
Cc: Steev Klimaszewski <st...@kali.org>
Cc: Johan Hovold <johan+lin...@kernel.org>
Cc: Bjorn Andersson <quic_bjora...@quicinc.com>
Fixes: 815891eee668 ("phy: qcom-qmp-combo: Introduce orientation variable")
Signed-off-by: Stephen Boyd <swb...@chromium.org>
---
drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
Yes I dont know why the commit 815891eee668 ("phy:
qcom-qmp-combo: Introduce orientation variable") changed the base in
below code. Certainly looks like a bug to me because we should be
writing to DP_PHY_MODE which is at an offset 0x1c from the dp_phy base.
Hence, this LGTM,
Reviewed-by: Abhinav Kumar <quic_abhin...@quicinc.com>
