--- Ramon van Handel <[EMAIL PROTECTED]> wrote: > >Isn't nop often used in branching? > > Huh ? Nop is the "No Operation" instruction. x86 > isn't RISC!!! > Oops!! Oh well. > >just iding until a hardware clock runs out we don't > >want it to just be sitting there eating up cpu > cycles > >that could be used elsewhere--so why not trap "nop" > >and thus allow the clock cycles to be put to good > use > >while redirecting any wait states into a virtual > >hardware timer inside of the monitor? > > You're confused with HLT, here. Hmmmmmm, ok. Back to the manual........ Drew Northup, N1XIM __________________________________________________ Do You Yahoo!? Talk to your friends online with Yahoo! Messenger. http://im.yahoo.com
- Re: Scan-before-execute and I&D TLB techniqu... Kevin P. Lawton
- Re: Scan-before-execute and I&D TLB tech... Jens Nerche
- Re: Scan-before-execute and I&D TLB ... Kevin P. Lawton
- Re: Scan-before-execute and I&D... Jens Nerche
- Re: Scan-before-execute and I&D TLB technique success... Ramon van Handel
- Re: Scan-before-execute and I&D TLB technique su... Kevin P. Lawton
- Re: Scan-before-execute and I&D TLB technique success... Drew Northup
- Re: Scan-before-execute and I&D TLB technique success... Ramon van Handel
- Re: Scan-before-execute and I&D TLB technique su... Eider Oliveira
- Re: Scan-before-execute and I&D TLB techniqu... Ramon van Handel
- Re: Scan-before-execute and I&D TLB technique success... Drew Northup
- Re: Scan-before-execute and I&D TLB technique su... Kevin P. Lawton
