Hi David

OK on the CPU load of LPCnet.

One thing Codec2 700D has shown is that high performance speech coding can be done at VERY low power consumption. That is a pretty deal for many tasks and applications. That's really important.

If LPCnet203 consumes that much of the AVX512 on a large, high IPC processor with lots of cache, than all I can think is that it is a F-ing long way away from a Pi4 (in its current form). If 2020 is to go into a microphone box like an SM1000....

I'll help whereever I can with PAPR reduction, because with 12dB PAPR, it needs to get down to 6dB PAPR (in my opinion) because SSB with a good RF speech processor is  about 5dB PAPR.

Try running a raspberry Pi4 at 100% full smoke and well, it will melt off the board...Still , most likely a quad core 1.5Ggig A53 is approx at best 18 GFLOPS without SIMD pipeline stalls and cache misses, and loading up the registers, so maybe divide that by  2 to get reality depending on the load/stores. which means it is *maybe* within reach for a paralleized LPCnet203

A $15 FPGA has approx 60 GFLOPS capability at less than a couple of watts. ......80 x 400 MHz single cycle multi function DSP blocks and 24,000 logic blocks, 1620Kb of 400 MHz dual port variable aspect (variable on each port) block RAM and 360kbits distributed RAM. "you don't know the power of the dark side".

:-) 73 glen




On 22/06/2020 9:31 pm, David Rowe wrote:
Hi Glen,

Codec 2 runs well on small floating point uCs, so not much to be gained
there in a FPGA implementation.  A few years ago Danilo did some fine
work on making it run faster on the stm32 but that's been the last real
effort. It's probably fast enough.

Most of the LPCNet CPU load is in some simple matrix operations ...
16000 times a second using 1.2E6 floating point weights.  It's all
recursive so single core, So you'd meed memory for them.  I suspect a
SIMD fixed point implementation would be a better move than FPGA, and
get it to the point where it runs on many more CPUs.  It may run on a
Pi4 if someone wants to make some more optimisation happen.

If you really want to play FPGA, maybe something like a Zync/Pluto based
HT, with all the filtering, modest PA etc.  Something that the average
Ham can click together to run open source radio.

Right now I'm having fun with HF and VHF data using the Codec 2 modems,
and one day I will have another lap around Codec 2 quality in the 600
bit/s range and a new FreeDV "mode" absorbing lessons learned the past
few years.  Speech quality still needs some work, and there's a few more
dB to get gained with some waveform improvements.

For the C++/Gui/sound card inclined, freedv-gui needs some love (see
issues list).



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