https://gcc.gnu.org/bugzilla/show_bug.cgi?id=87871
--- Comment #36 from Richard Earnshaw <rearnsha at gcc dot gnu.org> --- (In reply to Segher Boessenkool from comment #35) > Peter's patch solves this particular problem, but not the PR unfortunately. > > I finally understand Jakub's comment 30. This patch solves the PR (also > without Peter's patch): > > === > diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md > index 0aecd03..67dddb2 100644 > --- a/gcc/config/arm/arm.md > +++ b/gcc/config/arm/arm.md > @@ -6340,7 +6340,7 @@ (define_insn "*movsi_compare0" > (const_int 0))) > (set (match_operand:SI 0 "s_register_operand" "=r,r") > (match_dup 1))] > - "TARGET_32BIT" > + "TARGET_32BIT && reload_completed" > "@ > cmp%?\\t%0, #0 > subs%?\\t%0, %1, #0" > === And what about all the cases where the move and compare are not adjacent in the instruction stream so don't get matched by peepholing?
