https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89021
--- Comment #34 from hjl at gcc dot gnu.org <hjl at gcc dot gnu.org> --- Author: hjl Date: Wed May 15 15:23:11 2019 New Revision: 271242 URL: https://gcc.gnu.org/viewcvs?rev=271242&root=gcc&view=rev Log: i386: Emulate MMX ssse3_ph<plusminus_mnemonic>dv2si3 with SSE Emulate MMX ssse3_ph<plusminus_mnemonic>dv2si3 with SSE by moving bits 64:95 to bits 32:63 in SSE register. Only SSE register source operand is allowed. PR target/89021 * config/i386/sse.md (ssse3_ph<plusminus_mnemonic>dv2si3): Changed to define_insn_and_split to support SSE emulation. Modified: trunk/gcc/ChangeLog trunk/gcc/config/i386/sse.md