https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109907
Andrew Pinski <pinskia at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Depends on| |108847
--- Comment #13 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
(In reply to Georg-Johann Lay from comment #12)
> ...my bad, I tried "extzv<mode>", which didn't work out as expected.
>
> So we have shifts : bit-extract = 3 : 2.
>
> Is it worth trying to write combine patterns to catch this? Or will there
> be better lowering for the remaining caases?
So for the `a < 0` (which is the same as `a >> negbit` which you wrote
originally; cset_32bit31, cset_24bit23 and cset_32bit31_not), I noticed it got
expanded using arithmetic shift right followed by an `and` rather than a
logical shift right, even on x86. PR 108847 shows the behavior there. I will go
and look into fixing that PR in next few days. I will check back the resulting
AVR code generation (and the initial RTL) for those 3 cases after I fix the
shifting issue to see if there is anything else to do.
Referenced Bugs:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108847
[Bug 108847] unnecessary bitwise AND on boolean types and shifting of the
"sign" bit
