[Bug target/112431] RISC-V GCC-15 feature: Support register overlap on widen RVV instructions

[cvs-commit at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112431

--- Comment #7 from GCC Commits <cvs-commit at gcc dot gnu.org> ---
The trunk branch has been updated by Lehua Ding <lh...@gcc.gnu.org>:

https://gcc.gnu.org/g:5a35152f87a36db480693884dfb27ff6a5d5d683

commit r14-6007-g5a35152f87a36db480693884dfb27ff6a5d5d683
Author: Juzhe-Zhong <juzhe.zh...@rivai.ai>
Date:   Thu Nov 30 18:12:04 2023 +0800

    RISC-V: Remove earlyclobber for wx/wf instructions.

    While working on overlap for widening instructions, I realize that we set
    vwadd.wx/vfwadd.wf as earlyclobber which is incorrect.

    Since according to RVV ISA:
    "The destination EEW equals the source EEW."

    vwadd.vx widens the first source operand (i.e. 2 * source EEW = dest EEW)
while
    vwadd.wx only widens the second/scalar source operand.

    Therefore overlap is legal for wx but not for vx.

    Before this patch (heave spillings):

            csrr    a5,vlenb
            slli    a5,a5,1
            addi    a5,a5,64
            vfwadd.wf       v2,v14,fs0
            add     a5,a5,sp
            vs2r.v  v2,0(a5)
            vl2re32.v       v2,0(a1)
            vfwadd.wf       v14,v12,fs0
            vfwadd.wf       v12,v10,fs0
            vfwadd.wf       v10,v8,fs0
            vfwadd.wf       v8,v6,fs0
            vfwadd.wf       v6,v4,fs0
            vfwadd.wf       v4,v2,fs0
            vfwadd.wf       v2,v16,fs0
            vfwadd.wf       v16,v18,fs0
            vfwadd.wf       v18,v20,fs0
            vfwadd.wf       v20,v22,fs0
            vfwadd.wf       v22,v24,fs0
            vfwadd.wf       v24,v26,fs0
            vfwadd.wf       v26,v28,fs0
            vfwadd.wf       v28,v30,fs0
            vfwadd.wf       v30,v0,fs0
            nop
            vsetvli zero,zero,e32,m2,ta,ma
            csrr    a5,vlenb

    After this patch (no spillings):

            vfwadd.wf       v16,v16,fs0
            vfwadd.wf       v14,v14,fs0
            vfwadd.wf       v12,v12,fs0
            vfwadd.wf       v10,v10,fs0
            vfwadd.wf       v8,v8,fs0
            vfwadd.wf       v6,v6,fs0
            vfwadd.wf       v4,v4,fs0
            vfwadd.wf       v2,v2,fs0
            vfwadd.wf       v18,v18,fs0
            vfwadd.wf       v20,v20,fs0
            vfwadd.wf       v22,v22,fs0
            vfwadd.wf       v24,v24,fs0
            vfwadd.wf       v26,v26,fs0
            vfwadd.wf       v28,v28,fs0
            vfwadd.wf       v30,v30,fs0
            vfwadd.wf       v0,v0,fs0

    Confirm the codegen above run successfully on both SPIKE/QEMU.

            PR target/112431

    gcc/ChangeLog:

            * config/riscv/vector.md: Remove earlyclobber for wx/wf
instructions.

    gcc/testsuite/ChangeLog:

            * gcc.target/riscv/rvv/base/pr112431-19.c: New test.
            * gcc.target/riscv/rvv/base/pr112431-20.c: New test.
            * gcc.target/riscv/rvv/base/pr112431-21.c: New test.