https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112431
--- Comment #11 from GCC Commits <cvs-commit at gcc dot gnu.org> --- The trunk branch has been updated by Lehua Ding <lh...@gcc.gnu.org>: https://gcc.gnu.org/g:7804b4e24cd16283067225d4c2c4a4483a2b31bc commit r14-6113-g7804b4e24cd16283067225d4c2c4a4483a2b31bc Author: Juzhe-Zhong <juzhe.zh...@rivai.ai> Date: Mon Dec 4 16:51:06 2023 +0800 RISC-V: Remove earlyclobber from widen reduction Since the destination of reduction is not a vector register group, there is no need to apply overlap constraint. Also confirm Clang: The mir in LLVM has early clobber: early-clobber %49:vrm2 = PseudoVWADD_VX_M1 $noreg(tied-def 0), killed %17:vr, %48:gpr, %0:gprnox0, 3, 0; example.c:59:24 The mir in LLVM doesn't have early clobber: %48:vr = PseudoVWREDSUM_VS_M2_E8 $noreg(tied-def 0), %17:vrm2, killed %33:vr, %0:gprnox0, 3, 1; example.c:60:26 And also confirm both: vwredsum.vs v24, v8, v24 and vwredsum.vs v8, v8, v24 all legal on LLVM. Align with LLVM and honor RISC-V V spec, remove earlyclobber. Before this patch: vwredsum.vs v8,v24,v8 vwredsum.vs v7,v22,v7 vwredsum.vs v6,v20,v6 vwredsum.vs v5,v18,v5 vwredsum.vs v4,v16,v4 vwredsum.vs v3,v14,v3 vwredsum.vs v2,v12,v2 vwredsum.vs v1,v10,v1 vmv1r.v v9,v8 vwredsum.vs v9,v24,v9 vmv1r.v v24,v7 vwredsum.vs v24,v22,v24 vmv1r.v v22,v6 vwredsum.vs v22,v20,v22 vmv1r.v v20,v5 vwredsum.vs v20,v18,v20 vmv1r.v v18,v4 vwredsum.vs v18,v16,v18 vmv1r.v v16,v3 vwredsum.vs v16,v14,v16 vmv1r.v v14,v2 vwredsum.vs v14,v12,v14 vmv1r.v v12,v1 vwredsum.vs v12,v10,v12 After this patch: vfwredusum.vs v17,v12,v17 vfwredusum.vs v18,v10,v18 vfwredusum.vs v15,v26,v15 vfwredusum.vs v16,v24,v16 vfwredusum.vs v12,v12,v17 vfwredusum.vs v10,v10,v18 vfwredusum.vs v13,v6,v20 vfwredusum.vs v11,v8,v19 vfwredusum.vs v6,v6,v13 vfwredusum.vs v8,v8,v11 vfwredusum.vs v7,v4,v21 vfwredusum.vs v9,v2,v22 vfwredusum.vs v14,v26,v15 vfwredusum.vs v1,v24,v16 vfwredusum.vs v4,v4,v7 vfwredusum.vs v2,v2,v9 Same behavior as LLVM, and honor RISC-V V spec. PR target/112431 gcc/ChangeLog: * config/riscv/vector.md: Remove earlyclobber from widen reduction. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/base/pr112431-35.c: New test. * gcc.target/riscv/rvv/base/pr112431-36.c: New test.
