https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113281
--- Comment #5 from JuzheZhong <juzhe.zhong at rivai dot ai> ---
(In reply to JuzheZhong from comment #4)
> Confirm reduced case:
>
> #include <assert.h>
> unsigned char a;
>
> int main() {
> short b = a = 0;
> for (; a != 19; a++)
> if (a)
> b = 32872 >> a;
>
> assert (b == 0);
> }
>
> with -fno-vect-cost-model -march=rv64gcv -O3:
>
> https://godbolt.org/z/joGb3e9Eb
>
> Also run failed assertion "b == 0" failed: file "bug.c", line 10, function:
> main
>
> I suspect ARM SVE has the same fail.
>
> Hi, Andrew. Could you test this case on ARM to see whether ARM has same
> issue as RISC-V for me ?
The vect dump tree is quite similar between ARM and RISC-V.
