[Bug target/120550] New: [16 Regression] RISC-V: Miscompile at -O3 since r16-372-g064cac730f8

[ewlu at rivosinc dot com via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120550

            Bug ID: 120550
           Summary: [16 Regression] RISC-V: Miscompile at -O3 since
                    r16-372-g064cac730f8
           Product: gcc
           Version: 16.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: ewlu at rivosinc dot com
  Target Milestone: ---

Testcase:

int s = 1;
int v;
unsigned char u;
int ab = -1L;
void ai() {
  if ((s && (u |= ab)) > ab)
    u || v--;
  return;
}
int main() {
  unsigned char *as = &u;
  ab |= 1;
  ai();
  *as ^= 9;
  __builtin_printf("%d\n", u);
}

Commands (rv64gcv):
# -O3
> /scratch/ewlu/daily-upstream-build/build-gcv/bin/riscv64-unknown-linux-gnu-gcc
>  -O3 red.c -o user-config.out -fsigned-char -fno-strict-aliasing -fwrapv 
> QEMU_CPU=rv64,vlen=128,rvv_ta_all_1s=true,rvv_ma_all_1s=true,v=true,vext_spec=v1.0,zve32f=true,zve64f=true
>  timeout --verbose -k 0.1 4 
> /scratch/ewlu/daily-upstream-build/build-gcv/bin/qemu-riscv64 user-config.out 
> 1
-10

# -O2
> /scratch/ewlu/daily-upstream-build/build-gcv/bin/riscv64-unknown-linux-gnu-gcc
>  -O2 red.c -o user-config.out -fsigned-char -fno-strict-aliasing -fwrapv 
> QEMU_CPU=rv64,vlen=128,rvv_ta_all_1s=true,rvv_ma_all_1s=true,v=true,vext_spec=v1.0,zve32f=true,zve64f=true
>  timeout --verbose -k 0.1 4 
> /scratch/ewlu/daily-upstream-build/build-gcv/bin/qemu-riscv64 user-config.out 
> 1
246

Found via fuzzer