[Bug rtl-optimization/122735] RISCV: ICE during RTL pass: combine

[pinskia at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=122735

Andrew Pinski <pinskia at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Target|                            |riscv64
     Ever confirmed|0                           |1
   Last reconfirmed|                            |2025-11-18
             Status|UNCONFIRMED                 |NEW
          Component|target                      |rtl-optimization

--- Comment #1 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
(insn 11 10 13 2 (set (reg:DI 147)
        (sign_extend:DI (lshiftrt:SI (reg:SI 142 [ _1 ])
                (subreg:QI (reg:SI 144 [ _2 ]) 0)))) "/app/example.cpp":5:9 314
{lshrsi3_extend}
     (expr_list:REG_DEAD (reg:SI 144 [ _2 ])
        (expr_list:REG_DEAD (reg:SI 142 [ _1 ])
            (expr_list:REG_EQUAL (zero_extend:DI (lshiftrt:SI (const_int 19
[0x13])
                        (const_int 32 [0x20])))
                (nil)))))

That REG_EQUAL is invalid ...

Comes from fwprop1:
```
in notes of insn 11, replacing:
  (expr_list:REG_EQUAL (sign_extend:DI (lshiftrt:SI (const_int 19 [0x13])
                (subreg:QI (reg:SI 144 [ _2 ]) 0)))
        (expr_list:REG_DEAD (reg:SI 144 [ _2 ])
            (expr_list:REG_DEAD (reg:SI 142 [ _1 ])
                (nil))))
 with:
  (expr_list:REG_EQUAL (zero_extend:DI (lshiftrt:SI (const_int 19 [0x13])
                (const_int 32 [0x20])))
        (expr_list:REG_DEAD (reg:SI 144 [ _2 ])
            (expr_list:REG_DEAD (reg:SI 142 [ _1 ])
                (nil))))
rescanning insn with uid = 11.
```

That is not simplified because it is undefined.