https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115042
Richard Earnshaw <rearnsha at gcc dot gnu.org> changed:
What |Removed |Added
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CC| |vmakarov at redhat dot com
--- Comment #5 from Richard Earnshaw <rearnsha at gcc dot gnu.org> ---
reproduces on an arm-eabi cross with
cc1 -mfpu=neon -mfloat-abi=hard -march=armv7ve -fno-PIE -mthumb -O0 v6media.i
The asm pattern that fails takes 7 arguments (4 input registers and 3 outputs,
the outputs all marked as earlyclobber) and clobbers an additional 4 registers;
so needs 11 different registers at -O0 or in other worst-case scenarios. It
compiles OK in Arm state (-marm), but we simply run out of registers in Thumb
code (-mthumb).
Increasing the optimization to -O1 will also allow the compilation to succeed
since there are generally enough input registers with identical values to keep
the register count low enough. Furthermore, turning on the optimizer probably
allows the register allocator to eliminate the frame pointer.
Arm has 15 GP registers, but one of those is SP and a second is needed for the
frame pointer at -O0, so there are at most 13 GP regs available. It wouldn't
surprise me if the compiler needs at least 3 regs for its own needs, so I'd be
inclined to think that this code is at best flaky.
