https://gcc.gnu.org/bugzilla/show_bug.cgi?id=50481
Roger Sayle <roger at nextmovesoftware dot com> changed:
What |Removed |Added
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CC| |roger at nextmovesoftware dot
com
--- Comment #36 from Roger Sayle <roger at nextmovesoftware dot com> ---
Please forgive me asking an aarch64 specific question in a middle-end PR, but
in the recent (excellent) bitreverse patches for aarch64 is the bitwise-AND
actually required in:
** br8:
** and w0, w0, 255
** rbit w0, w0
** lsr w0, w0, 24
** ret
and
** br16:
** and w0, w0, 65535
** rbit w0, w0
** lsr w0, w0, 16
** ret
I'm guessing that either expanding via a paradoxical SUBREG, or a currently
missing RTL simplification (or a backend define_insn_and_split or peephole2)
should be able to remove the (I believe) unnecessary zero_extend.
