https://gcc.gnu.org/bugzilla/show_bug.cgi?id=50481
--- Comment #37 from Disservin <disservin.social at gmail dot com> --- (In reply to Roger Sayle from comment #36) > Please forgive me asking an aarch64 specific question in a middle-end PR, > but in the recent (excellent) bitreverse patches for aarch64 is the > bitwise-AND actually required in: > > ** br8: > ** and w0, w0, 255 > ** rbit w0, w0 > ** lsr w0, w0, 24 > ** ret > > and > > ** br16: > ** and w0, w0, 65535 > ** rbit w0, w0 > ** lsr w0, w0, 16 > ** ret > > I'm guessing that either expanding via a paradoxical SUBREG, or a currently > missing RTL simplification (or a backend define_insn_and_split or peephole2) > should be able to remove the (I believe) unnecessary zero_extend. it‘s not, see https://gcc.gnu.org/pipermail/gcc-patches/2026-May/717054.html but I first wanted to land the rbit patch since codegen wise it’s already a big improvement over the generic fallback.. i’d be happy if someone with more knowledge can get rid of the zero extend
