[Bug tree-optimization/125810] New: Vector intrinsics are not synthesized from SIMD operations if greater than native register width

[kuratius at googlemail dot com via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=125810

            Bug ID: 125810
           Summary: Vector intrinsics are not synthesized from SIMD
                    operations if greater than native register width
           Product: gcc
           Version: 16.1.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: tree-optimization
          Assignee: unassigned at gcc dot gnu.org
          Reporter: kuratius at googlemail dot com
  Target Milestone: ---

Created attachment 64748
  --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=64748&action=edit
Example code that shows the behavior

https://godbolt.org/z/qfKEjYbhG
Check the attached file with 
aarch64-linux-gnu-gcc -O3 -S -mcpu=cortex-a53 vectorOPs.c
and see what asm it generates. Clang does the sane thing and splits width 8
into two width 4 ops, instead of generating scalar operations.