[Bug middle-end/125810] Vector intrinsics are not synthesized from SIMD operations if greater than native register width

[rguenth at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=125810

Richard Biener <rguenth at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
   Last reconfirmed|                            |2026-06-16
             Status|UNCONFIRMED                 |NEW
     Ever confirmed|0                           |1

--- Comment #2 from Richard Biener <rguenth at gcc dot gnu.org> ---
IIRC expand_vector_conversion does not fully support using smaller vector
modes.  I'm not sure the re-vectorization work will handle .VEC_CONVERT
initially, but it certainly could.