https://gcc.gnu.org/bugzilla/show_bug.cgi?id=126789
--- Comment #10 from GCC Commits <cvs-commit at gcc dot gnu.org> --- The master branch has been updated by Richard Biener <[email protected]>: https://gcc.gnu.org/g:5d123455af27c526d9aa1e12a47d0177262b0e51 commit r17-3216-g5d123455af27c526d9aa1e12a47d0177262b0e51 Author: Richard Biener <[email protected]> Date: Wed Aug 12 08:59:18 2026 +0200 tree-optimization/126789 - MMX and SSE mask interaction with AVX512 The following makes the vectorizer deal with the fact that the x86 backend can have a set of integer mode masks and a set of integer vector mode masks depending on active ISAs. To convert between both representations we have to use vcond_mask for integer mode to integer vector mode. For the case of V2SImode the backend currently misses patterns which the following adds. Now, when doing BB vectorization the vectorizer pattern recognition cannot know that we'll use V2SImode with a vector integer mask mode but it guesses V16SImode which would use DImode. So we cannot arrange for the mask representation conversion during pattern recognition, but it's easy to handle VECTOR_BOOLEAN_TYPE_P conversions with vcond_mask as option in vectorizable_conversion, so that's what the patch does. I don't have a testcase for the reverse which would need to use vcmp[_eq] to convert from integer vector mode to integer mode mask, so I'm not implementing that with this patch. PR tree-optimization/126789 * config/i386/mmx.md (mmxxmmmode): Add V2SF and V2SI. (mmxxmmmodelower): Likewise. (vcond_mask_<mode>qi): New expander for V2SF and V2SI. * tree-vect-stmts.cc (vectorizable_conversion): Handle conversion via VEC_COND_EXPR. (supportable_indirect_convert_operation): For mask vector conversions to vector integer mode try using a VEC_COND_EXPR. * gcc.target/i386/vect-pr126789-2.c: New testcase.
