https://gcc.gnu.org/bugzilla/show_bug.cgi?id=128105
--- Comment #3 from GCC Commits <cvs-commit at gcc dot gnu.org> --- The releases/gcc-16 branch has been updated by Uros Bizjak <[email protected]>: https://gcc.gnu.org/g:0788b940a039fa8e9404f4b1a9ea100bfabf2309 commit r16-9823-g0788b940a039fa8e9404f4b1a9ea100bfabf2309 Author: Uros Bizjak <[email protected]> Date: Fri Oct 23 14:30:44 2026 +0200 i386: Disable AES, SHA and PCLMUL when SSE2 is disabled [PR128105] AES, SHA and PCLMUL all depend on SSE2 (their *_SET masks pull it in), but OPTION_MASK_ISA_SSE2_UNSET did not clear them. As a result, -mno-sse (or -mno-sse2) left these ISAs enabled, together with anything built on top of them such as VPCLMULQDQ, and the compiler could then try to use patterns that require XMM registers when SSE is not available. Add AES, SHA and PCLMUL to the SSE2 unset mask so that disabling SSE2 also disables the ISAs that depend on it. PR target/128105 gcc/ChangeLog: * common/config/i386/i386-common.cc (OPTION_MASK_ISA_SSE2_UNSET): Add OPTION_MASK_ISA_AES_UNSET, OPTION_MASK_ISA_SHA_UNSET and OPTION_MASK_ISA_PCLMUL_UNSET.
