https://gcc.gnu.org/bugzilla/show_bug.cgi?id=128620

            Bug ID: 128620
           Summary: [17 Regression][nvptx] ICE in gen_rtx_SUBREG, at
                    emit-rtl.cc:1062 (GCC selftest) since
                    r17-6105-gf90f1468590ad4
           Product: gcc
           Version: 17.0
            Status: UNCONFIRMED
          Keywords: build, ice-on-valid-code
          Severity: normal
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: burnus at gcc dot gnu.org
                CC: tnfchris at gcc dot gnu.org, tschwinge at gcc dot gnu.org
  Target Milestone: ---
            Target: nvptx

Building GCC with --target=nvptx-none fails during self test as follows.

Regression bisecting points to:

    commit f90f1468590ad46c0a64a3ba4a72ff7967d7c498
    Author:     Tamar Christina
    CommitDate: Tue Nov 10 11:34:33 2026 +0000

    middle-end: support multi-character output operand modifiers [PR122716]

It fails as:

LC_ALL=C GCC_COLORS= […]/xgcc
-B/net/amd-instinct3/srv/data/tburnus/projects/build-gcc-trunk-offload-nvptx/./gcc/
 […] -fself-test=[…]/testsuite/selftests

cc1: internal compiler error: in gen_rtx_SUBREG, at emit-rtl.cc:1062

0x228822b internal_error(char const*, ...)
        […]/gcc/diagnostic-global-context.cc:787
0x9f4c92 fancy_abort(char const*, int, char const*)
        […]/gcc/gcc/diagnostics/context.cc:1813
0x719611 gen_rtx_SUBREG(machine_mode, rtx_def*, poly_int<1u, unsigned long>)
        […]/gcc/emit-rtl.cc:1062
0x719611 gen_rtx_SUBREG(machine_mode, rtx_def*, poly_int<1u, unsigned long>)
        […]/gcc/emit-rtl.cc:1060
0xd3760b test_output_operand_modifier_operand
        […]/gcc/final.cc:4798
0xd3760b selftest::final_cc_tests()
        […]/gcc/final.cc:4820
0x218f57d selftest::run_tests()
        […]/gcc/selftest-run-tests.cc:109
0x11c0bee toplev::run_self_tests()
        […]/gcc/toplev.cc:2287

* * *

Failing assert:

1060    gen_rtx_SUBREG (machine_mode mode, rtx reg, poly_uint64 offset)
1061    {
1062      gcc_assert (validate_subreg (mode, GET_MODE (reg), reg, offset));
1063      return gen_rtx_raw_SUBREG (mode, reg, offset);

(gdb) p mode
$1 = E_QImode

(gdb) p debug(reg)
(reg:HI 0 %value)


with offset:

#2  gen_rtx_SUBREG (mode=mode@entry=E_QImode, reg=0x7ffff6c80cf0,
offset=offset@entry=...) at […]/gcc/emit-rtl.cc:1060
1060    gen_rtx_SUBREG (machine_mode mode, rtx reg, poly_uint64 offset)
(gdb) p offset
$5 = {coeffs = {0}}

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