On Wed, Sep 15, 2010 at 08:23:53AM -0700, Andrew Pinski wrote:
> On Wed, Sep 15, 2010 at 8:06 AM, Thomas Pornin
> <thomas.por...@cryptolog.com> wrote:
> > Hello all,
> >
> > gcc38 is documented to be a PS3, with a 3.2 Ghz Cell processor (PowerPC
> > architecture). Every (integer) code I run on it seems "sluggish". This
> > covers both my own C and assembly code, and, for instance, OpenSSL:
> > "openssl speed sha256" reports a top hashing speed of about 52 MB/s, as
> > if the CPU was running at 1 GHz or so.
> 
> No most likely what is happening is the code invokes cell microcode
> which is bad for performance.  There is a 7 cycle bubble just to
> decode the instruction (if microcoded) and then the instructions are
> executed and at that point turns off the other hardware thread while
> they are being executed.

If this is case, using -mwarn-cell-microcode may help track down the
problem. There is also an option listed in the info file
-mgen-cell-microcode; it's not totally clear from the docs if this is
the default setting or not.

Also keep in mind the PPU is only double issue, while something like
an i7 can issue 3 integer instructions plus a couple loads/stores per
cycle. And the branch predictor is much weaker on the PPU than most
modern processors. Hz isn't everything...

-Jack

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