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• [gcc r16-3417] libstdc++: Use _M_reverse to reverse partial_ordering using operator<=> Tomasz Kaminski via Gcc-cvs
• [gcc r16-3416] libstdc++: Move tai_- and gps_clock::now impls out of ABI Nathan Myers via Libstdc++-cvs
• [gcc r15-10265] c++/modules: Provide definitions of synthesized methods outside their defining module [PR120499] Nathaniel Shead via Gcc-cvs
• [gcc r16-3415] Remove dead code Richard Biener via Gcc-cvs
• [gcc r16-3414] libsupc++: Change _Unordered comparison value to minimum value of signed char. Tomasz Kaminski via Gcc-cvs
• [gcc r16-3413] c++: Fix up cpp_warn on __STDCPP_FLOAT*_T__ [PR121520] Jakub Jelinek via Gcc-cvs
• [gcc r16-3412] tree-optimization/121686 - failed SLP discovery for live recurrence Richard Biener via Gcc-cvs
• [gcc r16-3411] testsuite; Fix unprotected-allocas-1.c at -O3 [PR121684] Andrew Pinski via Gcc-cvs
• [gcc r16-3409] x86-64: Emit the TLS call after debug marker H.J. Lu via Gcc-cvs
• [gcc r16-3408] Move pr121656.c to gcc.dg/torture H.J. Lu via Gcc-cvs
• [gcc r16-3407] More RISC-V testsuite hygiene Jeff Law via Gcc-cvs
• [gcc r16-3405] OpenMP: give error when variant is the same as the base function [PR118839] Sandra Loosemore via Gcc-cvs
• [gcc r16-3404] OpenMP: Improve front-end error-checking for "declare variant" Sandra Loosemore via Gcc-cvs
• [gcc r16-3403] [committed] RISC-V Testsuite hygiene Jeff Law via Gcc-cvs
• [gcc r16-3402] libstdc++/ranges: Prefer using offset-based _CachedPosition Patrick Palka via Gcc-cvs
• [gcc(refs/users/mikael/heads/refactor_descriptor_v05)] Correction régression libgomp oacc-fortran/privatized-ref-2 Mikael Morin via Gcc-cvs
• [gcc(refs/users/mikael/heads/refactor_descriptor_v05)] Sauvegarde correction hypothétique Mikael Morin via Gcc-cvs
• [gcc r16-3401] testsuite: restrict ctf-array-7 test to 64-bit targets [PR121411] David Faust via Gcc-cvs
• [gcc r15-10263] testsuite: arm: Disable sched2 and sched3 in unsigned-extend-2.c Torbjorn Svensson via Gcc-cvs
• [gcc r15-10262] testsuite: arm: Fix unsigned-extend-2.c [PR116445] Torbjorn Svensson via Gcc-cvs
• [gcc r16-3400] testsuite: arm: Disable sched2 and sched3 in unsigned-extend-2.c Torbjorn Svensson via Gcc-cvs
• [gcc r16-3399] libstdc++: Do not require assignment for vector::resize(n, v) [PR90192] Tomasz Kaminski via Gcc-cvs
• [gcc r16-3398] libstdc++: Refactor bound arguments storage for bind_front/back Tomasz Kaminski via Libstdc++-cvs
• [gcc(refs/users/mikael/heads/refactor_descriptor_v05)] Correction régressions libgomp private-variables kernels-private-vars-loop-gang-6 Mikael Morin via Gcc-cvs
• [gcc(refs/users/mikael/heads/refactor_descriptor_v05)] Correction vérif motifs gomp/depend-4 et gomp/depend-6 Mikael Morin via Gcc-cvs
• [gcc(refs/users/mikael/heads/refactor_descriptor_v05)] Correction motif array_subref_actual_arg_1 Mikael Morin via Gcc-cvs
• [gcc r16-3397] libstdc++: Specialize _Never_valueless_alt for jthread, stop_token and stop_source Tomasz Kaminski via Libstdc++-cvs
• [gcc r16-3396] Enable unroll in the vectorizer when there's reduction for FMA/DOT_PROD_EXPR/SAD_EXPR hongtao Liu via Gcc-cvs
• [gcc(refs/users/mikael/heads/refactor_descriptor_v05)] gimple-simulate: correction assertion évaluation RSHIFT_EXPR Mikael Morin via Gcc-cvs
• [gcc(refs/users/mikael/heads/refactor_descriptor_v05)] Correction régression simd7 Mikael Morin via Gcc-cvs
• [gcc(refs/users/mikael/heads/refactor_descriptor_v05)] Correction partielle simd7 Mikael Morin via Gcc-cvs
• [gcc(refs/users/mikael/heads/refactor_descriptor_v05)] Élimination NON_LVALUE_EXPR de TYPE_MAX_VALUE Mikael Morin via Gcc-cvs
• [gcc(refs/users/mikael/heads/refactor_descriptor_v05)] Correction partielle régression libgomp simd7 Mikael Morin via Gcc-cvs
• [gcc(refs/users/mikael/heads/refactor_descriptor_v05)] Correction régression goacc/kernels-decompose-1 Mikael Morin via Gcc-cvs
• [gcc r16-3395] [PATCH] RISC-V: Add pattern for reverse floating-point divide Jeff Law via Gcc-cvs
• [gcc r16-3394] AArch64: extend cost model to cost outer loop vect where the inner loop is invariant [PR121290] Tamar Christina via Gcc-cvs
• [gcc r16-3393] [PATCH] RISC-V: Add pattern for vector-scalar single-width floating-point multiply Jeff Law via Gcc-cvs
• [gcc r16-3392] Fix RISC-V bootstrap Jeff Law via Gcc-cvs
• [gcc r16-3391] arm: testsuite: make gcc.target/arm/bics_3.c generate bics again Richard Earnshaw via Gcc-cvs
• [gcc r16-3390] Compute vect_reduc_type off SLP node instead of stmt-info Richard Biener via Gcc-cvs
• [gcc r16-3388] Fix UBSAN issue with load-store data refactoring Richard Biener via Gcc-cvs
• [gcc r16-3389] tree-optimization/121659 - bogus swap of reduction operands Richard Biener via Gcc-cvs
• [gcc r16-3387] Remove STMT_VINFO_REDUC_VECTYPE_IN Richard Biener via Gcc-cvs
• [gcc r16-3386] i386: Fix up recent changes to use GFNI for rotates/shifts [PR121658] Jakub Jelinek via Gcc-cvs
• [gcc r15-10261] c++: constrained corresponding using from partial spec [PR121351] Patrick Palka via Gcc-cvs
• [gcc r16-3384] RISC-V: Add test for vec_duplicate + vmacc.vv unsigned combine with GR2VR cost 0, 1 and 15 Pan Li via Gcc-cvs
• [gcc r16-3383] RISC-V: Add test for vec_duplicate + vmacc.vv signed combine with GR2VR cost 0, 1 and 15 Pan Li via Gcc-cvs
• [gcc r16-3382] RISC-V: Combine vec_duplicate + vmacc.vv to vmacc.vx on GR2VR cost Pan Li via Gcc-cvs
• [gcc r16-3381] omp-expand: Initialize fd->loop.n2 if needed for the zero iter case [PR121453] Jakub Jelinek via Gcc-cvs
• [gcc r16-3380] Add a test for PR tree-optimization/121656 H.J. Lu via Gcc-cvs
• [gcc r16-3379] ctf: avoid overflow for array num elements [PR121411] David Faust via Gcc-cvs
• [gcc r16-3378] forwprop: Boolify simplify_permutation Andrew Pinski via Gcc-cvs
• [gcc r16-3377] Forwprop: boolify forward_propagate_into_comparison Andrew Pinski via Gcc-cvs
• [gcc r16-3375] forwprop: Mark the old switch index for (maybe) dceing Andrew Pinski via Gcc-cvs
• [gcc r16-3376] forwprop: Remove return type of remove_prop_source_from_use Andrew Pinski via Gcc-cvs
• [gcc r16-3374] Rewrite bool loads for undefined case [PR121279] Andrew Pinski via Gcc-cvs
• [gcc r16-3373] LIM: Manually put uninit decl into ssa Andrew Pinski via Gcc-cvs
• [gcc r16-3372] xtensa: Make use of compact insn definition syntax for insns whose have multiple alternatives Max Filippov via Gcc-cvs
• [gcc r16-3371] xtensa: Simplify "*masktrue_const_bitcmpl" insn pattern Max Filippov via Gcc-cvs
• [gcc r16-3370] xtensa: Simplify "zero_extend[hq]isi2" insn patterns Max Filippov via Gcc-cvs
• [gcc r16-3369] c++: Implement C++ CWG3048 - Empty destructuring expansion statements Jakub Jelinek via Gcc-cvs
• [gcc r16-3368] c++: Check for *jump_target earlier in cxx_bind_parameters_in_call [PR121601] Jakub Jelinek via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Change bellow in comments to below Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Restrict generic-vector-ooo DFA Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Add missing insn types to xiangshan.md and mips-p8700.md Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vaaddu.vv combine for DImode Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vaaddu.vv combine case 1 with GR2VR cost 0, 1 and 2 for QI, HI Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vaaddu.vv combine case 0 with GR2VR cost 0, 2 and 15 for QI, HI Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Allow VLS DImode for sat_op vx DImode pattern Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add testcase for unsigned scalar SAT_ADD form 8 and form 9 Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Refine the test case for vector avg_floor and avg_ceil [NFC] Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vaaddu.vv to vaaddu.vx on GR2VR cost for HI, QI and SI mode Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add ashiftrt operand 2 for vector avg_floor and avg_ceil Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH] RISC-V: Vector-scalar widening negate-multiply-(subtract-)accumulate [PR119100] Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Fix vsetvl merge rule. Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH] RISC-V: prevent NULL_RTX dereference in riscv_macro_fusion_pair_p () Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Support RVVDImode for avg3_ceil auto vect Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Support RVVDImode for avg3_floor auto vect Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add testcase for rv32 SAT_MUL from uint64 Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH v5] RISC-V: Mips P8700 Conditional Move Support. Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add testcases for unsigned vector SAT_SUB form 11 and form 12 Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH v2] RISC-V: Vector-scalar widening multiply-(subtract-)accumulate [PR119100] Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Detect new fusions for RISC-V Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISCV: Remove the v extension requirement for sat scalar run test Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Make zero-stride load broadcast a tunable. Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vssub.vv combine case 1 with GR2VR cost 0, 1 and 2 Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vssub.vv to vssub.vx on GR2VR cost Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vssub.vv combine case 0 with GR2VR cost 0, 2 and 15 Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH] RISC-V: Enable zvfh for vector-scalar half-float run tests Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH] RISC-V: Adjust testdata for unsigned vector SAT_SUB Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/120642] Avoid propagating constant AVL for theadvector Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Disable uint128_t testcase of SAT_MUL when rv32 Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Do not use vsetivli for THeadVector. Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Ignore non-types in builtin function hash. Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vsadd.vv combine case 1 with GR2VR cost 0, 1 and 2 Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [committed][RISC-V] Fix testsuite fallout from check-function-bodies change Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test cases for unsigned scalar SAT_MUL from uint128_t Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Implement unsigned scalar SAT_MUL from uint128_t Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vsadd.vv combine case 0 with GR2VR cost 0, 2 and 15 Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vsadd.vv to vsadd.vx on GR2VR cost Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Add basic instrumentation to fusion detection Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Refactor record_function_versions. Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add testcases for signed scalar SAT_ADD IMM form 2 Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/118886] Refine when two insns are signaled as fusion candidates Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: testsuite: Skip tests providing -march/-mcpu for ILP32E/ILP64E ABIs Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH] [RISC-V] Fix shift type for RVV interleaved stepped patterns [PR120356] Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vssubu.vv combine case 1 with GR2VR cost 0, 1 and 2 Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vssubu.vv combine case 0 with GR2VR cost 0, 2 and 15 Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Reconcile the existing test due to cost model change Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vssubu.vv to vssubu.vx on GR2VR cost Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Ignore -Oz for most rvv testcase [NFC] Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Adding B ext, fp16 and missing scalar instruction type for sifive-7 pipeline model [PR120659 Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Primary vector pipeline model for sifive 7 series Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Vector-scalar negate-multiply-(subtract-)accumulate [PR119100] Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Refactor the function bitmap_union_of_preds_with_entry Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add pipeline-checker script Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: update prepare_ternary_operands to handle vector-scalar case [PR120828] Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Fix build issue Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/119971] Avoid losing shift count masking Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add comment and reorder the the include files in riscv.md [NFC] Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add Profiles RVA/B23S64 support. Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add patterns for vector-scalar multiply-(subtract-)accumulate [PR119100] Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vsaddu.vv combine case 1 with GR2VR cost 0, 1 and 2 Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vsaddu.vv combine case 0 with GR2VR cost 0, 2 and 15 Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vsaddu.vv to vsaddu.vx on GR2VR cost Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/118241] Fix data prefetch predicate/constraint for RISC-V Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Fix ICE for expand_select_vldi [PR120652] Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Force several tests to use rocket tuning Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH] RISC-V: Use builtin clz/ctz when count_leading_zeros and count_trailing_zeros is used Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vminu.vv combine case 1 with GR2VR cost 0, 1 and 2 Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vminu.vv to vminu.vx on GR2VR cost Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vminu.vv combine case 0 with GR2VR cost 0, 2 and 15 Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add generic tune as default. Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Use riscv_2x_xlen_mode_p [NFC] Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Adding cost model for zilsd Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vmin.vv combine case 1 with GR2VR cost 0, 1 and 2 Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vmin.vv combine case 0 with GR2VR cost 0, 2 and 15 Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vmin.vv to vmin.vx on GR2VR cost Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH v1] RISC-V: Use scratch reg for loop control Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add -fno-pie flags to testcases Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Refine VX combine test case 0 to avoid code duplication Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Update Profiles string in RV23. Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vmaxu.vv combine case 1 with GR2VR cost 0, 1 and 2 Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vmaxu.vv combine case 0 with GR2VR cost 0, 2 and 15 Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vmaxu.vv to vmaxu.vx on GR2VR cost Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_dup + vmax.vv combine case 1 with max func 1 and GR2VR cost 0, 1 and 2 Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_dup + vmax.vv combine case 1 with max func 0 and GR2VR cost 0, 1 and 2 Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_dup + vmax.vv combine case 0 with max func 1 and GR2VR cost 0, 2 and 15 Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_dup + vmax.vv combine case 0 with max func 0 and GR2VR cost 0, 2 and 15 Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Prevent speculative vsetvl insn scheduling Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vmax.vv to vmax.vx on GR2VR cost Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add patterns for vector-scalar negate-(multiply-add/sub) [PR119100] Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: testsuite: fix an obvious build error Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Reconcile the existing test for vremu.vx combine Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vremu.vv combine case 0 with GR2VR cost 0, 2 and 15 Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Regen riscv-ext.texi [NFC] Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vremu.vv combine case 1 with GR2VR cost 0, 1 and 2 Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vdivu.vv combine case 0 with GR2VR cost 0, 2 and 15 Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Enable more if-conversion on RISC-V Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vremu.vv to vremu.vx on GR2VR cost Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vidvu.vv to vdivu.vx on GR2VR cost Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vrem.vv combine case 1 with GR2VR cost 0, 1 and 2 Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vrem.vv combine case 0 with GR2VR cost 0, 2 and 15 Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Support -mcpu for XiangShan Kunminghu cpu. Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vrem.vv to vrem.vx on GR2VR cost Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Reconcile the existing test for vrem.vx combine Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Fix ICE for gcc.dg/graphite/pr33576.c with rv32gcv Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: frm/mode-switch: robustify call_insn backtracking [PR120203] Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Support Smrnmi extension. Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: frm/mode-switch: Reduce FRM restores on DYN transition [PR119164] Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH] RISC-V: Imply zicsr for svade and svadu extensions. Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: frm/mode-switch: remove dubious frm edge insertion before call_insn Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: frm/mode-switch: remove TARGET_MODE_CONFLUENCE Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [to-be-committed][RISC-V] Handle 32bit operands in condition for conditional moves Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Handle 32bit operands in condition for conditional moves Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Reconcile the existing test for vdivu.vx combine Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vdivu.vv combine case 1 with GR2VR cost 0, 1 and 2 Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Improve sequences to generate -1, 1 in some cases. Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Don't use structured binding in riscv-common.cc Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Improve signed division by 2^n Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Support Ssu64xl extension. Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Support Sstvala extension. Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Support Sstvecd extension. Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Support Sscounterenw extension. Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Support Sm/scsrind extensions. Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Support Ssccptr extension. Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add Shlcofideleg extension. Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Update extension defination. Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Reconcile the existing test for vdiv.vx combine Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH v2] RISC-V: Add svbare extension. Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Leverage get_vector_binary_rtx_cost to avoid code dup [NFC] Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vdiv.vv combine case 1 with GR2VR cost 0, 1 and 2 Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vidv.vv to vdiv.vx on GR2VR cost Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vdiv.vv combine case 0 with GR2VR cost 0, 2 and 15 Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH] RISC-V: Add smcntrpmf extension. Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Use helper function to get FPR to VR move cost Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Adjust build rule for gen-riscv-ext-opt and gen-riscv-ext-texi Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add pattern for vector-scalar multiply-add/sub [PR119100] Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Implement full-featured iterator for riscv_subset_list [NFC] Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH] testsuite: RISC-V: Fix the typo in param-autovec-mode.c Jeff Law via Gcc-cvs

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