https://gcc.gnu.org/g:e53dd9b90ff8c7c1890d1cc2b71141e9f0953b31
commit e53dd9b90ff8c7c1890d1cc2b71141e9f0953b31 Author: Michael Meissner <[email protected]> Date: Mon Nov 3 18:35:35 2025 -0500 Update ChangeLog.* Diff: --- gcc/ChangeLog.test | 334 +++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 334 insertions(+) diff --git a/gcc/ChangeLog.test b/gcc/ChangeLog.test index 39d42528770e..f25e65cb787e 100644 --- a/gcc/ChangeLog.test +++ b/gcc/ChangeLog.test @@ -1,3 +1,337 @@ +==================== Branch work223-test, patch #430 patch #439 ==================== + +Add --with-powerpc-float16 and --with-powerpc-float16-disable-warning. + +2025-11-03 Michael Meissner <[email protected]> + +gcc/ + + * config.gcc (powerpc*-*-*): Add support for the configuration option + --with-powerpc-float16 and --with-powerpc-float16-disable-warning. + * config/rs6000/rs6000-call.cc (init_cumulative_args): Likewise. + (rs6000_function_arg): Likewise. + * config/rs6000/rs6000-cpus.def (TARGET_16BIT_FLOATING_POINT): Likewise. + (ISA_2_7_MASKS_SERVER): Likewise. + (POWERPC_MASKS): Likewise. + +==================== Branch work223-test, patch #430 patch #438 ==================== + +Fix __bfloat16 signalling NaN support on PowerPC. + +2025-11-03 Michael Meissner <[email protected]> + +libstdc++-v3/ + + * include/limits (__bfloat16 signaling_NaN): Use __builtin_nansf and + convert it to __bfloat16 instead of using __builtin_nansf16b. + +==================== Branch work223-test, patch #430 patch #437 ==================== + +Add 16-bit floating point vectorization. + +2025-11-03 Michael Meissner <[email protected]> + +gcc/ + + * config.gcc (powerpc*-*-*): Add float16.o. + * config/rs6000/float16.cc: New file to add 16-bit floating point + vectorization. + * config/rs6000/float16.md: (FP16_BINARY_OP): New mode iterator. + (fp16_names): New mode attribute. + (UNSPEC_XVCVSPHP_V8HF): New unspec. + (UNSPEC_XVCVSPBF16_V8BF): Likewise. + (<fp16_names><mode>): New insns to support vectorization of 16-bit + floating point. + (fma<mode>4): Likewise. + (fms<mode>4): Likewise. + (nfma<mode>): Likewise. + (nfms<mode>4): Likewise. + (vec_pack_trunc_v4sf_v8hf): Likewise. + (vec_pack_trunc_v4sf_v8bf): Likewise. + (vec_pack_trunc_v4sf): Likewise. + (xvcvsphp_v8hf): Likewise. + (xvcvspbf16_v8bf): Likewise. + (vec_unpacks_hi_v8hf): Likewise. + (vec_unpacks_lo_v8hf): Likewise. + (xvcvhpsp_v8hf): Likewise. + (vec_unpacks_hi_v8bf): Likewise. + (vec_unpacks_lo_v8bf): Likewise. + (xvcvbf16spn_v8bf): Likewise. + * config/rs6000/rs6000-protos.h (enum fp16_operation): New enumeration + for vectorizing 16-bit floating point. + (fp16_vectorization): New declaration. + * config/rs6000/t-rs6000 (float16.o): Add build rules. + +==================== Branch work223-test, patch #430 patch #436 ==================== + +Add BF/HF neg, abs operands and logical insns. + +2025-11-03 Michael Meissner <[email protected]> + +gcc/ + + * config/rs6000/float16.md (neg<mode>2): Add BFmode/HFmode negate, + absolute value and negative absolute value operations. Add logical + insns operating on BFmode/HFmode. + (abs<mode>2): Likewise. + (nabs<mode>2): Likewise. + (and<mode>3): Likewise. + (ior<mode>): Likewise. + (xor<mode>3): Likewise. + (nor<mode>3): Likewise. + (andn<mode>3): Likewise. + (eqv<mode>3): Likewise. + (nand<mode>3): Likewise. + (iorn<mode>3): Likewise. + (bool<mode>3): Likewise. + (boolc<mode>3): Likewise. + (boolcc<mode>): Likewise. + +==================== Branch work223-test, patch #430 patch #435 ==================== + +Add conversions between 16-bit floating point and other scalar modes. + +2025-11-03 Michael Meissner <[email protected]> + +gcc/ + + * config/rs6000/float16.md (fp16_float_convert): New mode iterator. + (extend<FP16_HW:mode><fp16_float_convert:mode>2): New insns to convert + between the 2 16-bit floating point modes and other floating point + scalars other than SFmode/DFmode by converting first to DFmode. + (trunc<fp16_float_convert:mode><FP16_HW:mode>2): Likewise. + (float<GPR:mode><FP16_HW:mode>2): New insns to convert beween the 2 + 16-bit floating point modes and signed/unsigned integers. + (floatuns<GPR:mode><FP16_HW:mode>2): Likewise. + (fix_trunc<FP16_HW:mode><GPR:mode>): Likewise. + (fixuns_trunc<FP16_HW:mode><GPR:mode>2): Likewise. + +==================== Branch work223-test, patch #430 patch #434 ==================== + +Add conversions between __bfloat16 and float/double. + +2025-11-03 Michael Meissner <[email protected]> + +gcc/ + + * config/rs6000/float16.md (FP16_HW): Add BFmode. + (VFP16_HW): New mode iterator. + (cvt_fp16_to_v4sf_insn): New mode attribute. + (FP16_VECTOR4): Likewise. + (UNSPEC_FP16_SHIFT_LEFT_32BIT): New unspec constant. + (UNSPEC_CVT_FP16_TO_V4SF): Likewise. + (UNSPEC_XXSPLTW_FP16): Likewise. + (UNSPEC_XVCVSPBF16_BF): Likewise. + (extendbf<mode>2): New insns to convert between BFmode and + SFmode/DFmode. + (xscvdpspn_sf): Likewise. + (xscvspdpn_sf): Likewise. + (<fp16_vector8>_shift_left_32bit): Likewise. + (trunc<mode>bf): Likewise. + (vsx_xscvdpspn_sf): Likewise. + (cvt_fp16_to_v4sf_<mode): Likewise. + (cvt_fp16_to_v4sf_<mode>_le): Likewise. + (cvt_fp16_to_v4sf_<mode>_be): Likewise. + (dup_<mode>_to_v4s): Likewise. + (xxspltw_<mode>): Likewise. + (xvcvbf16spn_bf): Likewise. + (xvcvspbf16_bf): Likewise. + * config/rs6000/rs6000.h (TARGET_BFLOAT16_HW): New macro. + (FP16_HW_SCALAR_MODE_P): Add BFmode on power10. + +==================== Branch work223-test, patch #430 patch #433 ==================== + +Add conversions between _Float16 and float/double. + +2025-11-03 Michael Meissner <[email protected]> + +gcc/ + + * config/rs6000/float16.md (FP16_HW): New mode iterator. + (extendhf<mode>2): Add support converting between HFmode and + SFmode/DFmoded if we are on power9 or later. + (trunc<mode>hf2): Likewise. + * config/rs6000/rs6000.h (TARGET_FLOAT16_HW): New macro. + (FP16_HW_SCALAR_MODE_P): Likewise. + +==================== Branch work223-test, patch #430 patch #432 ==================== + +Add HF/BF emulation functions to libgcc. + +2025-11-03 Michael Meissner <[email protected]> + +libgcc/ + + * config.host (powerpc*-*-linux*): Add HF/BF emulation functions to + PowerPC libgcc. + * config/rs6000/sfp-machine.h (_FP_NANFRAC_H): New macro. + (_FP_NANFRAC_B): Likewise. + (_FP_NANSIGN_H): Likewise. + (_FP_NANSIGN_B): Likewise. + (DFtype2): Add HF/BF emulation function declarations. + (SFtype2): Likewise. + (DItype2): Likewise. + (UDItype2): Likewise. + (SItype2): Likewise. + (USItype2): Likewise. + (HFtype2): Likewise. + (__eqhf2): Likewise. + (__extendhfdf2): Likewise. + (__extendhfsf2): Likewise. + (__fixhfdi): Likewise. + (__fixhfsi): Likewise. + (__fixunshfdi): Likewise. + (__fixunshfsi): Likewise. + (__floatdihf): Likewise. + (__floatsihf): Likewise. + (__floatundihf): Likewise. + (__floatunsihf): Likewise. + (__truncdfhf2): Likewise. + (__truncsfhf2): Likewise. + (BFtype2): Likewise. + (__extendbfsf2): Likewise. + (__floatdibf): Likewise. + (__floatsibf): Likewise. + (__floatundibf): Likewise. + (__floatunsibf): Likewise. + (__truncdfbf2): Likewise. + (__truncsfbf2): Likewise. + (__truncbfhf2): Likewise. + (__trunchfbf2): Likewise. + * config/rs6000/t-bfloat16: New file. + * config/rs6000/t-both-fp16: Likewise. + * config/rs6000/t-float16: Likewise. + * configure.ac (powerpc*-*-linux*): Check if the PowerPC compiler + supports _Float16 and __bfloat16 types. + * configure: Regenerate. + +==================== Branch work223-test, patch #430 patch #431 ==================== + +Add initial _Float16 and __bfloat16 support. + +2025-11-03 Michael Meissner <[email protected]> + +gcc/ + + * config/rs6000/float16.md: New file. + * config/rs6000/predicats.md (easy_fp_constant): Add support for BFmode + and HFmode constants. + (fp16_xxspltiw_constant): New predicate. + * config/rs6000/rs6000-builtin.cc (rs6000_type_string): Add support for + BFmode and HFmode. + (rs6000_init_builtins): Create bfloat16_type_node and add support for + the __bfloat16 keyword. + * config/rs6000/rs6000-c.cc (rs6000_target_modify_macros): Define + __FLOAT16__ if _Float16 is supported. Define __BFLOAT16__ if __bfloat16 + is supported. + * config/rs6000/rs6000-call.cc (init_cumulative_args): Warn if 16-bit + floating point values are returned. + (rs6000_function_arg): Warning if 16-bit floating point values are + passed as arguments. + * config/rs6000/rs6000-protos.h (vec_const_128bit_type): Ad mode field + for supporting 16-bit floating point constants. + * config/rs6000/rs6000.cc (rs6000_hard_regno_mode_ok_uncached): Add + support for BFmode and HFmode. + (rs6000_modes_tieable_p): Likewise. + (rs6000_debug_reg_global): Likewise. + (rs6000_setup_reg_addr_masks): Likewise. + (rs6000_init_hard_regno_mode_ok): Likewise. + (rs6000_option_override_internal): Add checks for -mfloat16 and + -mbfloat16. + (easy_altivec_constant): Add support for HFmode and BFmode constants. + (rs6000_expand_vector_init): Likewise. + (reg_offset_addressing_ok_p): Restrict HFmode and BFmode to indexed + addressing. + (rs6000_legitimate_offset_address_p): Likewise. + (legitimate_lo_sum_address_p): Likewise. + (rs6000_secondary_reload_simple_move): Add support for HFmode and + BFmode. + (rs6000_preferred_reload_class): Likewise. + (rs6000_can_change_mode_class): Likewise. + (rs6000_load_constant_and_splat): Likewise. + (rs6000_scalar_mode_supported_p): Likewise. + (rs6000_floatn_mode): Likewise. + (rs6000_opt_masks): Add support for -mfloat16 and -mbfloat16 options. + (constant_fp_to_128bit_vector): Add support for HFmode and BFmode. + (constant_generates_xxspltiw): Likewise. + * config/rs6000/rs6000.h (FP16_SCALAR_MODE_P): New macro. + (FP16_VECTOR_MODE_P): Likewise. + * config/rs6000/rs6000.md (toplevel): Include float16.md. + * config/rs6000/rs6000.opt (-mfloat16): New option. + (-mbfloat16): Likewise. + +==================== Branch work223-test, patch #430 patch #430 ==================== + +Add V8HFmode, V8BFmode, HFmode, BFmode. + +2025-11-03 Michael Meissner <[email protected]> + +gcc/ + + * config/rs6000/altivec.md (VM): Add V8HFmode and V8BFmode as general + vector modes. Add HFmode, BFmode modes to be added in the future. + (VM2): Likewise. + (VI_char): Likewise. + (VI_scalar): Likewise. + (VI_unit): Likewise. + (VP_small): Likewise. + (VP_small_lc): Likewise. + (VU_char): Likewise. + * config/rs6000/rs6000-modes.def (HFmode): Likewise. + (BFmode): Likewise. + (V8BFmode): Likewise. + (V8HFmode): Likewise. + * config/rs6000/rs6000-p8swap.cc (rs6000_gen_stvx): Likewise. + (replace_swapped_load_constant): Likewise. + * config/rs6000/rs6000.cc (rs6000_debug_reg_global): Likewise. + (rs6000_init_hard_regno_mode_ok): Likewise. + (xxspltib_constant_p): Likewise. + (output_vec_const_move): Likewise. + (rs6000_expand_vector_init): Likewise. + (rs6000_const_vec): Likewise. + (rs6000_emit_move): Likewise. + * config/rs6000/rs6000.h (ALTIVEC_VECTOR_MODE): Likewise. + * config/rs6000/rs6000.md (FMOVE128_GPR): Likewise. + (wd): Likewise. + (du_or_d): Likewise. + (BOOL_128): Likewise. + (BOOL_REGS_OUTPUT): Likewise. + (BOOL_REGS_OP1): Likewise. + (BOOL_REGS_OP2): Likewise. + (BOOL_REGS_UNARY): Likewise. + (RELOAD): Likewise. + * config/rs6000/vector.md (VEC_L): Likewise. + (VEC_M): Likewise. + (VEC_E): Likewise. + (VEC_base): Likewise. + (VEC_base_l): Likewise. + * config/rs6000/vsx.md (VECTOR_16BIT): Likewise. + (VSX_L): Likewise. + (VSX_M): Likewise. + (VSX_XXBR): Likewise. + (VSm): Likewise. + (VSr): Likewise. + (VSisa): Likewise. + (??r): Likewise. + (nW): Likewise. + (VSv): Likewise. + (VM3): Likewise. + (VM3_char): Likewise. + (vsx_le_perm_load_<mode>): Likewise. + (vsx_le_perm_store_<mode>): Likewise. + (V8HImode/V8HFmode/V8BFmode splitter): Likewise. + (vsx_ld_elemrev_<mode>): Likewise. + (vsx_ld_elemrev_<mode>_internal): Likewise. + (sx_st_elemrev_<mode>): Likewise. + (sx_st_elemrev_<mode>): Likewise. + (vsx_st_elemrev_<mode>_interna): Likewise. + (xxswapd_<mode>): Likewise. + (sx_lxvd2x8_le_<MODE>): Likewise. + (vsx_stxvd2x8_le_<MODE>): Likewise. + (vsx_extract_<mode>_di_p9): Likewise. + (*vsx_extract_<mode>_store_p9): Likewise. + (vsx_extract_<mode>_p8): Likewise. + ==================== Branch work223-test, patch #428 was reverted ==================== ==================== Branch work223-test, patch #427 was reverted ==================== ==================== Branch work223-test, patch #426 was reverted ====================
