https://gcc.gnu.org/g:d37d6fce7cc8f117bd70ec98182985b66fa19e3f
commit d37d6fce7cc8f117bd70ec98182985b66fa19e3f Author: Michael Meissner <[email protected]> Date: Thu Jun 25 02:46:55 2026 -0400 Add support for 1,024 bit dense math registers. This is part five of the dense math register patches for the PowerPC. This is the 7th version of the dense math patches. Version 6 of the dense math register patches were posted on April 21st, 2026. * https://gcc.gnu.org/pipermail/gcc-patches/2026-April/713352.html * https://gcc.gnu.org/pipermail/gcc-patches/2026-April/713353.html * https://gcc.gnu.org/pipermail/gcc-patches/2026-April/713354.html * https://gcc.gnu.org/pipermail/gcc-patches/2026-April/713355.html * https://gcc.gnu.org/pipermail/gcc-patches/2026-April/713356.html * https://gcc.gnu.org/pipermail/gcc-patches/2026-April/713357.html This patch needs the -mcpu=future patch posted on April 8th, 2026: * https://gcc.gnu.org/pipermail/gcc-patches/2026-April/712532.html This patch is functionally the same as the version 6 patch, except I made the same name changes as I discussed in the previous patch. This patch (#5) is a prelimianry patch to add the full 1,024 bit dense math register (DMFs) for -mcpu=future. The MMA 512-bit accumulators map onto the top of the DMR register. This patch only adds the new 1,024 bit register support. It does not add support for any instructions that need 1,024 bit registers instead of 512 bit registers. I used the new mode 'TDOmode' to be the opaque mode used for 1,024 bit registers. The 'wD' constraint added in previous patches is used for these registers. I added support to do load and store of DMRs via the VSX registers, since there are no load/store dense math instructions. I added the new keyword '__dm1024' to create 1,024 bit types that can be loaded into dense math registers. I have built bootstrap little endian compilers on power10 systems, and big endian compiler on power9 systems. There were no regression in the tests. Can I add the patches to the GCC trunk after the -mcpu=future patch is applied and GCC 17 has opened up? 2026-06-25 Michael Meissner <[email protected]> gcc/ * config/rs6000/mma.md (UNSPEC_DMF_INSERT512_UPPER): New unspec. (UNSPEC_DMF_INSERT512_LOWER): Likewise. (UNSPEC_DMF_EXTRACT512): Likewise. (UNSPEC_DMF_RELOAD_FROM_MEMORY): Likewise. (UNSPEC_DMF_RELOAD_TO_MEMORY): Likewise. (movtdo): New define_expand and define_insn_and_split to implement 1,024 bit dense math registers. (movtdo_insert512_upper): New insn. (movtdo_insert512_lower): Likewise. (movtdo_extract512): Likewise. (reload_tdo_from_memory): Likewise. (reload_tdo_to_memory): Likewise. * config/rs6000/rs6000-builtin.cc (rs6000_type_string): Add dense math register support. (rs6000_init_builtins): Add support for __dm1024 keyword. * config/rs6000/rs6000-call.cc (rs6000_return_in_memory): Add support for TDOmode. (rs6000_function_arg): Likewise. * config/rs6000/rs6000-modes.def (TDOmode): New mode. * config/rs6000/rs6000.cc (rs6000_hard_regno_mode_ok_uncached): Add support for TDOmode. (rs6000_hard_regno_mode_ok): Likewise. (rs6000_modes_tieable_p): Likewise. (rs6000_debug_reg_global): Likewise. (rs6000_setup_reg_addr_masks): Likewise. (rs6000_init_hard_regno_mode_ok): Add support for TDOmode. Setup reload hooks for dense math TDO reload mode. (reg_offset_addressing_ok_p): Add support for TDOmode. (rs6000_emit_move): Likewise. (rs6000_secondary_reload_simple_move): Likewise. (rs6000_preferred_reload_class): Likewise. (rs6000_mangle_type): Add mangling for __dm1024 type. (rs6000_dmf_register_move_cost): Add support for TDOmode. (rs6000_split_multireg_move): Likewise. (rs6000_invalid_conversion): Likewise. * config/rs6000/rs6000.h (VECTOR_ALIGNMENT_P): Add TDOmode. (enum rs6000_builtin_type_index): Add dense math register type nodes. (dm1024_type_node): Likewise. (ptr_dm1024_type_node): Likewise. gcc/testsuite/ * gcc.target/powerpc/dm-1024bit.c: New test. Diff: --- gcc/config/rs6000/rs6000.cc | 8 -------- 1 file changed, 8 deletions(-) diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc index c40fc3a8a255..07b6c690ad5f 100644 --- a/gcc/config/rs6000/rs6000.cc +++ b/gcc/config/rs6000/rs6000.cc @@ -1897,7 +1897,6 @@ rs6000_hard_regno_mode_ok_uncached (int regno, machine_mode mode) && (regno & 1) == 0); } -<<<<<<< HEAD if (mode == TDOmode) { if (!TARGET_DENSE_MATH) @@ -1914,9 +1913,6 @@ rs6000_hard_regno_mode_ok_uncached (int regno, machine_mode mode) /* No other types other than XOmode or TDOmode can go in dense math registers. */ -======= - /* No other types other than XOmode can go in dense math registers. */ ->>>>>>> d5eee992f97 (Add support for dense math registers.) if (DMF_REGNO_P (regno)) return 0; @@ -2707,11 +2703,7 @@ rs6000_setup_reg_addr_masks (void) /* Special case dense math registers. */ if (rc == RELOAD_REG_DMR) { -<<<<<<< HEAD if (TARGET_DENSE_MATH && (m2 == XOmode || m2 == TDOmode)) -======= - if (TARGET_DENSE_MATH && m2 == XOmode) ->>>>>>> d5eee992f97 (Add support for dense math registers.) { addr_mask = RELOAD_REG_VALID; reg_addr[m].addr_mask[rc] = addr_mask;
