https://gcc.gnu.org/g:207cacd36362b25d08b7c18bcc0e7df15113ade2
commit 207cacd36362b25d08b7c18bcc0e7df15113ade2 Author: Michael Meissner <[email protected]> Date: Wed Jul 1 10:54:14 2026 -0400 Add miscellaneous -mcpu=future instructions 2026-07-01 Michael Meissner <[email protected]> gcc/ * config/rs6000/rs6000-cpus.def (FUTURE_MASKS_SERVER): Enable using load vector pair and store vector pair instructions for memory copy operations. (POWERPC_MASKS): Make the option for enabling using load vector pair and store vector pair operations set and reset when the PowerPC processor is changed. * config/rs6000/rs6000.cc (rs6000_machine_from_flags): Disable -mblock-ops-vector-pair from influencing .machine selection. gcc/testsuite/ * gcc.target/powerpc/future-3.c: New test. 2026-07-01 Michael Meissner <[email protected]> gcc/ * config/rs6000/rs6000.md (gtu_geu): New code iterator. (subfus<mode>3_<code>): New insns. gcc/testsuite/ * gcc.target/powerpc/saturate-subtract-1.c: New test. * gcc.target/powerpc/saturate-subtract-2.c: Likewise. * lib/target-supports.exp (check_effective_target_powerpc_future_ok): New target test. 2026-07-01 Michael Meissner <[email protected]> gcc/ * config/rs6000/altivec.md (xvrlw): New insn. * config/rs6000/rs6000.h (TARGET_XVRLW): New macro. gcc/testsuite/ * gcc.target/powerpc/vector-rotate-left.c: New test. 2026-07-01 Michael Meissner <[email protected]> gcc/ * config/rs6000/rs6000-string.cc (expand_block_move): Do not generate lxvl and stxvl on 32-bit. * config/rs6000/vsx.md (lxvl): If -mcpu=future, generate the lxvl with the shift count automaticaly used in the insn. (lxvrl): New insn for -mcpu=future. (lxvrll): Likewise. (stxvl): If -mcpu=future, generate the stxvl with the shift count automaticaly used in the insn. (stxvrl): New insn for -mcpu=future. (stxvrll): Likewise. gcc/testsuite/ * gcc.target/powerpc/lxvrl.c: New test. 2026-07-01 Michael Meissner <[email protected]> gcc/ * config/rs6000/constraints.md (eU): New constraint. (eV): Likewise. * config/rs6000/predicates.md (paddis_operand): New predicate. (paddis_paddi_operand): Likewise. (add_cint_operand): Add paddis support. (reg_or_add_cint_operand): Add support for adds that can be done with paddis and paddi/addi. (add_operand): Add support for adds that can be done with paddis, but not paddis + paddi/addi.. * config/rs6000/rs6000.cc (num_insns_constant_gpr): Add support for adds that can be done with paddis and also paddis combined with paddi/addi. (print_operand): Add %B<n> for paddis support. * config/rs6000/rs6000.h (TARGET_PADDIS): New macro. (SIGNED_INTEGER_64BIT_P): Likewise. * config/rs6000/rs6000.md (add<mode>3 define_expand): Add paddis support. (*add<mode>3 define_insn): Likewise. (movdi_internal64): Likewise. (movdi splitter): New splitter for paddis + paddi/addi. * doc/md.texi (PowerPC constraints): Add eU and eV documentation. gcc/testsuite/ * gcc.target/powerpc/prefixed-addis.c: New test. Diff: --- gcc/config/rs6000/rs6000-cpus.def | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/gcc/config/rs6000/rs6000-cpus.def b/gcc/config/rs6000/rs6000-cpus.def index 482d39bc4d82..331501179099 100644 --- a/gcc/config/rs6000/rs6000-cpus.def +++ b/gcc/config/rs6000/rs6000-cpus.def @@ -101,7 +101,7 @@ will be fixed in potential future machines. */ #define FUTURE_MASKS_SERVER (POWER11_MASKS_SERVER \ | OPTION_MASK_BLOCK_OPS_VECTOR_PAIR \ - | OPTION_MASK_DMF \ + | OPTION_MASK_DENSE_MATH \ | OPTION_MASK_FUTURE) /* Flags that need to be turned off if -mno-vsx. */
