Hello,
The Cortex-A72 is an ARMv8 core with the same architectural features as
the Cortex-A57. This patch adds support for the command line option
-mcpu=cortex-a72 with the same effect as the -mcpu=cortex-a57 option,
with only the name being different. It also adds support for the
-mcpu=cortex-a72.cortex-a53 big-little variant.
Tested with check-gcc for arm-none-linux-gnueabihf. Tested the new cpu
options from the command line.
Matthew
gcc/
2015-02-04 Matthew Wahab <matthew.wa...@arm.com>
* config/arm/arm-cores.def: Add cortex-a72 and
cortex-a72.cortex-a53.
* config/arm/bpabi.h (BE8_LINK_SPEC): Likewise.
* config/arm/t-aprofile (MULTILIB_MATCHES): Likewise.
* config/arm/arm-tune.md: Regenerate.
* config/arm/arm-tables.opt: Add entries for "cortex-a72" and
"cortex-a72.cortex-a53".
* doc/invoke.texi (ARM Options/-mtune): Likewise.
diff --git a/gcc/config/arm/arm-cores.def b/gcc/config/arm/arm-cores.def
index f24fefd..d7e730d 100644
--- a/gcc/config/arm/arm-cores.def
+++ b/gcc/config/arm/arm-cores.def
@@ -167,7 +167,9 @@ ARM_CORE("cortex-a17.cortex-a7", cortexa17cortexa7, cortexa7, 7A, FL_LDSCHED |
/* V8 Architecture Processors */
ARM_CORE("cortex-a53", cortexa53, cortexa53, 8A, FL_LDSCHED | FL_CRC32, cortex_a53)
ARM_CORE("cortex-a57", cortexa57, cortexa57, 8A, FL_LDSCHED | FL_CRC32, cortex_a57)
+ARM_CORE("cortex-a72", cortexa72, cortexa57, 8A, FL_LDSCHED | FL_CRC32, cortex_a57)
ARM_CORE("xgene1", xgene1, xgene1, 8A, FL_LDSCHED, xgene1)
/* V8 big.LITTLE implementations */
ARM_CORE("cortex-a57.cortex-a53", cortexa57cortexa53, cortexa53, 8A, FL_LDSCHED | FL_CRC32, cortex_a57)
+ARM_CORE("cortex-a72.cortex-a53", cortexa72cortexa53, cortexa53, 8A, FL_LDSCHED | FL_CRC32, cortex_a57)
diff --git a/gcc/config/arm/arm-tables.opt b/gcc/config/arm/arm-tables.opt
index 1392429..3450e5b 100644
--- a/gcc/config/arm/arm-tables.opt
+++ b/gcc/config/arm/arm-tables.opt
@@ -310,11 +310,17 @@ EnumValue
Enum(processor_type) String(cortex-a57) Value(cortexa57)
EnumValue
+Enum(processor_type) String(cortex-a72) Value(cortexa72)
+
+EnumValue
Enum(processor_type) String(xgene1) Value(xgene1)
EnumValue
Enum(processor_type) String(cortex-a57.cortex-a53) Value(cortexa57cortexa53)
+EnumValue
+Enum(processor_type) String(cortex-a72.cortex-a53) Value(cortexa72cortexa53)
+
Enum
Name(arm_arch) Type(int)
Known ARM architectures (for use with the -march= option):
diff --git a/gcc/config/arm/arm-tune.md b/gcc/config/arm/arm-tune.md
index dcd5054..d459f27 100644
--- a/gcc/config/arm/arm-tune.md
+++ b/gcc/config/arm/arm-tune.md
@@ -32,6 +32,6 @@
cortexr4f,cortexr5,cortexr7,
cortexm7,cortexm4,cortexm3,
marvell_pj4,cortexa15cortexa7,cortexa17cortexa7,
- cortexa53,cortexa57,xgene1,
- cortexa57cortexa53"
+ cortexa53,cortexa57,cortexa72,
+ xgene1,cortexa57cortexa53,cortexa72cortexa53"
(const (symbol_ref "((enum attr_tune) arm_tune)")))
diff --git a/gcc/config/arm/bpabi.h b/gcc/config/arm/bpabi.h
index 8e16434..c62130d 100644
--- a/gcc/config/arm/bpabi.h
+++ b/gcc/config/arm/bpabi.h
@@ -71,6 +71,8 @@
|mcpu=cortex-a53 \
|mcpu=cortex-a57 \
|mcpu=cortex-a57.cortex-a53 \
+ |mcpu=cortex-a72 \
+ |mcpu=cortex-a72.cortex-a53 \
|mcpu=xgene1 \
|mcpu=cortex-m1.small-multiply \
|mcpu=cortex-m0.small-multiply \
@@ -93,6 +95,8 @@
|mcpu=cortex-a53 \
|mcpu=cortex-a57 \
|mcpu=cortex-a57.cortex-a53 \
+ |mcpu=cortex-a72 \
+ |mcpu=cortex-a72.cortex-a53 \
|mcpu=xgene1 \
|mcpu=cortex-m1.small-multiply \
|mcpu=cortex-m0.small-multiply \
diff --git a/gcc/config/arm/t-aprofile b/gcc/config/arm/t-aprofile
index 6a280bd..e8b2aa3 100644
--- a/gcc/config/arm/t-aprofile
+++ b/gcc/config/arm/t-aprofile
@@ -89,6 +89,8 @@ MULTILIB_MATCHES += march?armv7ve=mcpu?cortex-a17.cortex-a7
MULTILIB_MATCHES += march?armv8-a=mcpu?cortex-a53
MULTILIB_MATCHES += march?armv8-a=mcpu?cortex-a57
MULTILIB_MATCHES += march?armv8-a=mcpu?cortex-a57.cortex-a53
+MULTILIB_MATCHES += march?armv8-a=mcpu?cortex-a72
+MULTILIB_MATCHES += march?armv8-a=mcpu?cortex-a72.cortex-a53
# Arch Matches
MULTILIB_MATCHES += march?armv8-a=march?armv8-a+crc
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 2d3c4f7..55586a7 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -12966,7 +12966,8 @@ Permissible names are: @samp{arm2}, @samp{arm250},
@samp{arm1136j-s}, @samp{arm1136jf-s}, @samp{mpcore}, @samp{mpcorenovfp},
@samp{arm1156t2-s}, @samp{arm1156t2f-s}, @samp{arm1176jz-s}, @samp{arm1176jzf-s},
@samp{cortex-a5}, @samp{cortex-a7}, @samp{cortex-a8}, @samp{cortex-a9},
-@samp{cortex-a12}, @samp{cortex-a15}, @samp{cortex-a53}, @samp{cortex-a57},
+@samp{cortex-a12}, @samp{cortex-a15}, @samp{cortex-a53},
+@samp{cortex-a57}, @samp{cortex-a72},
@samp{cortex-r4},
@samp{cortex-r4f}, @samp{cortex-r5}, @samp{cortex-r7}, @samp{cortex-m7},
@samp{cortex-m4},
@@ -12985,7 +12986,7 @@ Permissible names are: @samp{arm2}, @samp{arm250},
Additionally, this option can specify that GCC should tune the performance
of the code for a big.LITTLE system. Permissible names are:
-@samp{cortex-a15.cortex-a7}, @samp{cortex-a57.cortex-a53}.
+@samp{cortex-a15.cortex-a7}, @samp{cortex-a57.cortex-a53}, @samp{cortex-a72.cortex-a53}.
@option{-mtune=generic-@var{arch}} specifies that GCC should tune the
performance for a blend of processors within architecture @var{arch}.
