The infrastructure for atomic operations in the rs6000 port has not
utilized the cleaner GCC internal APIs for manipulating memmodel. The
appended patch converts the direct casts and use of memmodel_from_int
to consistently use memmodel_base. This also allows the SYNC variants
to be removed from switch case statements. This should not change any
semantics or behavior of atomics in PowerPC code generation.
Comments?
Bootstrapped on powerpc-ibm-aix7.1.0.0
* config/rs6000/rs6000.c (rs6000_pre_atomic_barrier): Remove SYNC
variants cases from switch.
(rs6000_post_atomic_barrier): Same.
(rs6000_expand_atomic_compare_and_swap): Use memmodel_base.
(rs6000_expand_atomic_exchange): Same.
(rs6000_expand_atomic_op): Same.
* config/rs6000/sync.md (mem_thread_fence): Use memodel_base. Remove
SYNC variants cases from switch.
(atomic_load): Same.
(atomic_store): Same.
Thanks, David
* config/rs6000/rs6000.c (rs6000_pre_atomic_barrier): Remove SYNC
variants cases from switch.
(rs6000_post_atomic_barrier): Same.
(rs6000_expand_atomic_compare_and_swap): Use memmodel_base.
(rs6000_expand_atomic_exchange): Same.
(rs6000_expand_atomic_op): Same.
* config/rs6000/sync.md (mem_thread_fence): Use memodel_base. Remove
SYNC variants cases from switch.
(atomic_load): Same.
(atomic_store): Same.
Index: rs6000.c
===================================================================
--- rs6000.c (revision 224288)
+++ rs6000.c (working copy)
@@ -20558,15 +20558,12 @@ rs6000_pre_atomic_barrier (rtx mem, enum memmodel
case MEMMODEL_RELAXED:
case MEMMODEL_CONSUME:
case MEMMODEL_ACQUIRE:
- case MEMMODEL_SYNC_ACQUIRE:
break;
case MEMMODEL_RELEASE:
- case MEMMODEL_SYNC_RELEASE:
case MEMMODEL_ACQ_REL:
emit_insn (gen_lwsync ());
break;
case MEMMODEL_SEQ_CST:
- case MEMMODEL_SYNC_SEQ_CST:
emit_insn (gen_hwsync ());
break;
default:
@@ -20583,13 +20580,10 @@ rs6000_post_atomic_barrier (enum memmodel model)
case MEMMODEL_RELAXED:
case MEMMODEL_CONSUME:
case MEMMODEL_RELEASE:
- case MEMMODEL_SYNC_RELEASE:
break;
case MEMMODEL_ACQUIRE:
- case MEMMODEL_SYNC_ACQUIRE:
case MEMMODEL_ACQ_REL:
case MEMMODEL_SEQ_CST:
- case MEMMODEL_SYNC_SEQ_CST:
emit_insn (gen_isync ());
break;
default:
@@ -20690,8 +20684,8 @@ rs6000_expand_atomic_compare_and_swap (rtx operand
oldval = operands[3];
newval = operands[4];
is_weak = (INTVAL (operands[5]) != 0);
- mod_s = memmodel_from_int (INTVAL (operands[6]));
- mod_f = memmodel_from_int (INTVAL (operands[7]));
+ mod_s = memmodel_base (INTVAL (operands[6]));
+ mod_f = memmodel_base (INTVAL (operands[7]));
orig_mode = mode = GET_MODE (mem);
mask = shift = NULL_RTX;
@@ -20810,7 +20804,7 @@ rs6000_expand_atomic_exchange (rtx operands[])
retval = operands[0];
mem = operands[1];
val = operands[2];
- model = (enum memmodel) INTVAL (operands[3]);
+ model = memmodel_base (INTVAL (operands[3]));
mode = GET_MODE (mem);
mask = shift = NULL_RTX;
@@ -20861,7 +20855,7 @@ void
rs6000_expand_atomic_op (enum rtx_code code, rtx mem, rtx val,
rtx orig_before, rtx orig_after, rtx model_rtx)
{
- enum memmodel model = (enum memmodel) INTVAL (model_rtx);
+ enum memmodel model = memmodel_base (INTVAL (model_rtx));
machine_mode mode = GET_MODE (mem);
machine_mode store_mode = mode;
rtx label, x, cond, mask, shift;
Index: sync.md
===================================================================
--- sync.md (revision 224288)
+++ sync.md (working copy)
@@ -41,7 +41,7 @@
[(match_operand:SI 0 "const_int_operand" "")] ;; model
""
{
- enum memmodel model = memmodel_from_int (INTVAL (operands[0]));
+ enum memmodel model = memmodel_base (INTVAL (operands[0]));
switch (model)
{
case MEMMODEL_RELAXED:
@@ -48,14 +48,11 @@
break;
case MEMMODEL_CONSUME:
case MEMMODEL_ACQUIRE:
- case MEMMODEL_SYNC_ACQUIRE:
case MEMMODEL_RELEASE:
- case MEMMODEL_SYNC_RELEASE:
case MEMMODEL_ACQ_REL:
emit_insn (gen_lwsync ());
break;
case MEMMODEL_SEQ_CST:
- case MEMMODEL_SYNC_SEQ_CST:
emit_insn (gen_hwsync ());
break;
default:
@@ -147,7 +144,7 @@
if (<MODE>mode == TImode && !TARGET_SYNC_TI)
FAIL;
- enum memmodel model = memmodel_from_int (INTVAL (operands[2]));
+ enum memmodel model = memmodel_base (INTVAL (operands[2]));
if (is_mm_seq_cst (model))
emit_insn (gen_hwsync ());
@@ -185,9 +182,7 @@
break;
case MEMMODEL_CONSUME:
case MEMMODEL_ACQUIRE:
- case MEMMODEL_SYNC_ACQUIRE:
case MEMMODEL_SEQ_CST:
- case MEMMODEL_SYNC_SEQ_CST:
emit_insn (gen_loadsync_<mode> (operands[0]));
break;
default:
@@ -214,17 +209,15 @@
if (<MODE>mode == TImode && !TARGET_SYNC_TI)
FAIL;
- enum memmodel model = memmodel_from_int (INTVAL (operands[2]));
+ enum memmodel model = memmodel_base (INTVAL (operands[2]));
switch (model)
{
case MEMMODEL_RELAXED:
break;
case MEMMODEL_RELEASE:
- case MEMMODEL_SYNC_RELEASE:
emit_insn (gen_lwsync ());
break;
case MEMMODEL_SEQ_CST:
- case MEMMODEL_SYNC_SEQ_CST:
emit_insn (gen_hwsync ());
break;
default:
