-----Original Message----- From: Bin.Cheng [mailto:amker.ch...@gmail.com] Sent: Monday, September 28, 2015 7:05 AM To: Ajit Kumar Agarwal Cc: Segher Boessenkool; GCC Patches; Vinod Kathail; Shail Aditya Gupta; Vidhumouli Hunsigida; Nagaraju Mekala Subject: Re: [Patch,optimization]: Optimized changes in the estimate register pressure cost.
On Sun, Sep 27, 2015 at 11:13 PM, Ajit Kumar Agarwal <ajit.kumar.agar...@xilinx.com> wrote: > > > -----Original Message----- > From: Segher Boessenkool [mailto:seg...@kernel.crashing.org] > Sent: Sunday, September 27, 2015 7:49 PM > To: Ajit Kumar Agarwal > Cc: GCC Patches; Vinod Kathail; Shail Aditya Gupta; Vidhumouli > Hunsigida; Nagaraju Mekala > Subject: Re: [Patch,optimization]: Optimized changes in the estimate register > pressure cost. > > On Sat, Sep 26, 2015 at 04:51:20AM +0000, Ajit Kumar Agarwal wrote: >> SPEC CPU 2000 benchmarks are run and there is following impact on the >> performance and code size. >> >> ratio with the optimization vs ratio without optimization for INT >> benchmarks >> (3807.632 vs 3804.661) >> >> ratio with the optimization vs ratio without optimization for FP >> benchmarks ( 4668.743 vs 4778.741) > >>>Did you swap these? You're saying FP got significantly worse? > > Sorry for the typo error. Please find the corrected one. > > Ratio with the optimization vs ratio without optimization for FP > benchmarks ( 4668.743 vs 4668.741). With the optimization FP is slightly > better performance. >>Did you mis-type the number again? Or this must be noise. Now I remember >>why I didn't get perf improvement from this. Changing reg_new to reg_new >>+ >>reg_old doesn't have big impact because it just increased the starting number >>for each scenarios. Maybe it still makes sense for cases on the verge of >>>>exceeding target's available register number. I will try to collect >>benchmark data on ARM, but it may take some time. This is the correct one. Thanks & Regards Ajit Thanks, bin > > Thanks & Regards > Ajit > > Segher
