Hopefully, this is correct now; it does pass the functional test case
that's part of the patch. Unfortunately the define_insn patters
had to be duplicated because of the new subreg offsets. Not sure
whether I've missed any "use" patterns that should be added.
Ciao
Dominik ^_^ ^_^
--
Dominik Vogt
IBM Germany
gcc/ChangeLog
* config/s390/s390.c (s390_expand_setmem): Use new expanders.
* config/s390/s390.md ("*setmem_long")
("*setmem_long_and", "*setmem_long_31z"): Fix warnings.
("*setmem_long_and_64", "*setmem_long_and_31", "*setmem_long_and_31z")
("*setmem_long_64", "*setmem_long_31"): Renamed and duplicated.
("setmem_long_<P:mode>"): New expanders.
("setmem_long"): Removed.
gcc/testsuite/ChangeLog
* gcc.target/s390/md/setmem_long-1.c: New test.
>From 922d200afbe8493e62b0ffb300fbac11356469c8 Mon Sep 17 00:00:00 2001
From: Dominik Vogt <[email protected]>
Date: Wed, 4 Nov 2015 03:16:24 +0100
Subject: [PATCH 1/1.5] S/390: Fix warnings in "*setmem_long..." patterns.
---
gcc/config/s390/s390.c | 7 +-
gcc/config/s390/s390.md | 89 ++++++++++++++++++------
gcc/testsuite/gcc.target/s390/md/setmem_long-1.c | 64 +++++++++++++++++
3 files changed, 138 insertions(+), 22 deletions(-)
create mode 100644 gcc/testsuite/gcc.target/s390/md/setmem_long-1.c
diff --git a/gcc/config/s390/s390.c b/gcc/config/s390/s390.c
index 7e7ed45..1a77437 100644
--- a/gcc/config/s390/s390.c
+++ b/gcc/config/s390/s390.c
@@ -5203,7 +5203,12 @@ s390_expand_setmem (rtx dst, rtx len, rtx val)
else if (TARGET_MVCLE)
{
val = force_not_mem (convert_modes (Pmode, QImode, val, 1));
- emit_insn (gen_setmem_long (dst, convert_to_mode (Pmode, len, 1), val));
+ if (TARGET_64BIT)
+ emit_insn (gen_setmem_long_di (dst, convert_to_mode (Pmode, len, 1),
+ val));
+ else
+ emit_insn (gen_setmem_long_si (dst, convert_to_mode (Pmode, len, 1),
+ val));
}
else
diff --git a/gcc/config/s390/s390.md b/gcc/config/s390/s390.md
index 7eca315..27e5c7f 100644
--- a/gcc/config/s390/s390.md
+++ b/gcc/config/s390/s390.md
@@ -70,6 +70,9 @@
; Copy CC as is into the lower 2 bits of an integer register
UNSPEC_CC_TO_INT
+ ; Convert Pmode to BLKmode
+ UNSPEC_REPLICATE_BYTE
+
; GOT/PLT and lt-relative accesses
UNSPEC_LTREL_OFFSET
UNSPEC_LTREL_BASE
@@ -3281,12 +3284,12 @@
; Initialize a block of arbitrary length with (operands[2] % 256).
-(define_expand "setmem_long"
+(define_expand "setmem_long_<P:mode>"
[(parallel
[(clobber (match_dup 1))
(set (match_operand:BLK 0 "memory_operand" "")
- (match_operand 2 "shift_count_or_setmem_operand" ""))
- (use (match_operand 1 "general_operand" ""))
+ (unspec:BLK [(match_operand:P 2 "shift_count_or_setmem_operand" "Y")
+ (match_dup 4)] UNSPEC_REPLICATE_BYTE))
(use (match_dup 3))
(clobber (reg:CC CC_REGNUM))])]
""
@@ -3307,30 +3310,29 @@
operands[0] = replace_equiv_address_nv (operands[0], addr0);
operands[1] = reg0;
operands[3] = reg1;
+ operands[4] = gen_lowpart (Pmode, operands[1]);
})
-(define_insn "*setmem_long"
- [(clobber (match_operand:<DBL> 0 "register_operand" "=d"))
- (set (mem:BLK (subreg:P (match_operand:<DBL> 3 "register_operand" "0") 0))
- (match_operand 2 "shift_count_or_setmem_operand" "Y"))
- (use (match_dup 3))
- (use (match_operand:<DBL> 1 "register_operand" "d"))
+(define_insn "*setmem_long_64"
+ [(clobber (match_operand:TI 0 "register_operand" "=d"))
+ (set (mem:BLK (subreg:DI (match_operand:TI 3 "register_operand" "0") 0))
+ (unspec:BLK [(match_operand:DI 2 "shift_count_or_setmem_operand" "Y")
+ (subreg:DI (match_dup 3) 8)] UNSPEC_REPLICATE_BYTE))
+ (use (match_operand:TI 1 "register_operand" "d"))
(clobber (reg:CC CC_REGNUM))]
- "TARGET_64BIT || !TARGET_ZARCH"
+ "TARGET_64BIT"
"mvcle\t%0,%1,%Y2\;jo\t.-4"
[(set_attr "length" "8")
(set_attr "type" "vs")])
-(define_insn "*setmem_long_and"
- [(clobber (match_operand:<DBL> 0 "register_operand" "=d"))
- (set (mem:BLK (subreg:P (match_operand:<DBL> 3 "register_operand" "0") 0))
- (and (match_operand 2 "shift_count_or_setmem_operand" "Y")
- (match_operand 4 "const_int_operand" "n")))
- (use (match_dup 3))
- (use (match_operand:<DBL> 1 "register_operand" "d"))
+(define_insn "*setmem_long_31"
+ [(clobber (match_operand:DI 0 "register_operand" "=d"))
+ (set (mem:BLK (subreg:SI (match_operand:DI 3 "register_operand" "0") 0))
+ (unspec:BLK [(match_operand:SI 2 "shift_count_or_setmem_operand" "Y")
+ (subreg:SI (match_dup 3) 4)] UNSPEC_REPLICATE_BYTE))
+ (use (match_operand:DI 1 "register_operand" "d"))
(clobber (reg:CC CC_REGNUM))]
- "(TARGET_64BIT || !TARGET_ZARCH) &&
- (INTVAL (operands[4]) & 255) == 255"
+ "!TARGET_64BIT && !TARGET_ZARCH"
"mvcle\t%0,%1,%Y2\;jo\t.-4"
[(set_attr "length" "8")
(set_attr "type" "vs")])
@@ -3338,8 +3340,8 @@
(define_insn "*setmem_long_31z"
[(clobber (match_operand:TI 0 "register_operand" "=d"))
(set (mem:BLK (subreg:SI (match_operand:TI 3 "register_operand" "0") 4))
- (match_operand 2 "shift_count_or_setmem_operand" "Y"))
- (use (match_dup 3))
+ (unspec:BLK [(match_operand:SI 2 "shift_count_or_setmem_operand" "Y")
+ (subreg:SI (match_dup 3) 12)] UNSPEC_REPLICATE_BYTE))
(use (match_operand:TI 1 "register_operand" "d"))
(clobber (reg:CC CC_REGNUM))]
"!TARGET_64BIT && TARGET_ZARCH"
@@ -3347,6 +3349,51 @@
[(set_attr "length" "8")
(set_attr "type" "vs")])
+(define_insn "*setmem_long_and_64"
+ [(clobber (match_operand:TI 0 "register_operand" "=d"))
+ (set (mem:BLK (subreg:DI (match_operand:TI 3 "register_operand" "0") 0))
+ (unspec:BLK [(and:DI
+ (match_operand:DI 2 "shift_count_or_setmem_operand" "Y")
+ (match_operand:DI 4 "const_int_operand" "n"))
+ (subreg:DI (match_dup 3) 8)] UNSPEC_REPLICATE_BYTE))
+ (use (match_operand:TI 1 "register_operand" "d"))
+ (clobber (reg:CC CC_REGNUM))]
+ "TARGET_64BIT &&
+ (INTVAL (operands[4]) & 255) == 255"
+ "mvcle\t%0,%1,%Y2\;jo\t.-4"
+ [(set_attr "length" "8")
+ (set_attr "type" "vs")])
+
+(define_insn "*setmem_long_and_31"
+ [(clobber (match_operand:DI 0 "register_operand" "=d"))
+ (set (mem:BLK (subreg:SI (match_operand:DI 3 "register_operand" "0") 0))
+ (unspec:BLK [(and:SI
+ (match_operand:SI 2 "shift_count_or_setmem_operand" "Y")
+ (match_operand:SI 4 "const_int_operand" "n"))
+ (subreg:SI (match_dup 3) 4)] UNSPEC_REPLICATE_BYTE))
+ (use (match_operand:DI 1 "register_operand" "d"))
+ (clobber (reg:CC CC_REGNUM))]
+ "(!TARGET_64BIT && !TARGET_ZARCH) &&
+ (INTVAL (operands[4]) & 255) == 255"
+ "mvcle\t%0,%1,%Y2\;jo\t.-4"
+ [(set_attr "length" "8")
+ (set_attr "type" "vs")])
+
+(define_insn "*setmem_long_and_31z"
+ [(clobber (match_operand:TI 0 "register_operand" "=d"))
+ (set (mem:BLK (subreg:SI (match_operand:TI 3 "register_operand" "0") 4))
+ (unspec:BLK [(and:SI
+ (match_operand:SI 2 "shift_count_or_setmem_operand" "Y")
+ (match_operand:SI 4 "const_int_operand" "n"))
+ (subreg:SI (match_dup 3) 12)] UNSPEC_REPLICATE_BYTE))
+ (use (match_operand:TI 1 "register_operand" "d"))
+ (clobber (reg:CC CC_REGNUM))]
+ "(!TARGET_64BIT && TARGET_ZARCH) &&
+ (INTVAL (operands[4]) & 255) == 255"
+ "mvcle\t%0,%1,%Y2\;jo\t.-4"
+ [(set_attr "length" "8")
+ (set_attr "type" "vs")])
+
;
; cmpmemM instruction pattern(s).
;
diff --git a/gcc/testsuite/gcc.target/s390/md/setmem_long-1.c b/gcc/testsuite/gcc.target/s390/md/setmem_long-1.c
new file mode 100644
index 0000000..dec46ce
--- /dev/null
+++ b/gcc/testsuite/gcc.target/s390/md/setmem_long-1.c
@@ -0,0 +1,64 @@
+/* Machine description pattern tests. */
+
+/* { dg-do run } */
+/* { dg-options "-mmvcle -dP" } */
+
+#include <string.h>
+#include <stdio.h>
+#include <stdlib.h>
+
+void test(char *p, char c, int len)
+{
+ __builtin_memset(p, c, len);
+}
+
+void test2(char *p, int c, int len)
+{
+ __builtin_memset(p, (char)c, len);
+}
+
+/* Check that the right patterns are used. */
+/* { dg-final { scan-assembler-times {c:12 .*{[*]setmem_long_[36][14]z?}} 1 } } */
+/* { dg-final { scan-assembler-times {c:17 .*{[*]setmem_long_[36][14]z?}} 1 } } */
+
+#define LEN 500
+char buf[LEN + 2];
+
+void init_buf(void)
+{
+ int i;
+
+ buf[0] = 0;
+ for (i = 1; i <= LEN; i++)
+ buf[i] = (0x10 + (i & 0x3f));
+ buf[LEN + 1] = 0x7f;
+}
+
+void validate_buf(char val, const char *test)
+{
+ int i;
+
+ if (buf[0] != 0)
+ goto error;
+ for (i = 1; i <= LEN; i++)
+ if (buf[i] != val)
+ goto error;
+ if (buf[LEN + 1] != 0x7f)
+ goto error;
+ return;
+
+ error:
+ fprintf(stderr, "error: %s() failed at byte %d (0x%02x)\n", test, i,
+ (int) buf[i]);
+ exit(1);
+}
+
+int main(void)
+{
+ init_buf();
+ test(buf + 1, 55, LEN);
+ validate_buf(55, "test");
+ init_buf();
+ test(buf + 1, 66, LEN);
+ validate_buf(66, "test2");
+}
--
2.3.0
>From 590e4da997ee294fe4d53e933941cf506691d9f4 Mon Sep 17 00:00:00 2001
From: Dominik Vogt <[email protected]>
Date: Wed, 2 Dec 2015 10:30:05 +0100
Subject: [PATCH 1.5/1.5] S/390: Make sure the setmem_long_and_patterns are used.
---
gcc/testsuite/gcc.target/s390/md/setmem_long-1.c | 8 +++++++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/gcc/testsuite/gcc.target/s390/md/setmem_long-1.c b/gcc/testsuite/gcc.target/s390/md/setmem_long-1.c
index dec46ce..0a4a82c 100644
--- a/gcc/testsuite/gcc.target/s390/md/setmem_long-1.c
+++ b/gcc/testsuite/gcc.target/s390/md/setmem_long-1.c
@@ -19,7 +19,13 @@ void test2(char *p, int c, int len)
/* Check that the right patterns are used. */
/* { dg-final { scan-assembler-times {c:12 .*{[*]setmem_long_[36][14]z?}} 1 } } */
-/* { dg-final { scan-assembler-times {c:17 .*{[*]setmem_long_[36][14]z?}} 1 } } */
+/* { dg-final { scan-assembler-times {c:17 .*{[*]setmem_long_and_[36][14]z?}} 1 } } */
+
+/* Check that the setmem_long_and pattern is used properly. */
+/* { dg-final { scan-assembler-not "\tsllg\t" } } */
+/* { dg-final { scan-assembler-not "\tllgcr\t" } } */
+/* { dg-final { scan-assembler-not "\tn\t" } } */
+/* { dg-final { scan-assembler-not "\tllcr\t" } } */
#define LEN 500
char buf[LEN + 2];
--
2.3.0
