Hello, As a follow up of
https://gcc.gnu.org/ml/gcc-patches/2016-05/msg01240.html, This patch set adds ARMv8.2-A FP16 scalar and vector intrinsics support, gcc middle-end will also be aware of some standard operations that some instructions can be auto-generated. According to ACLE, ARMv8.2-A FP16 intrinsics for AArch64 is superset of intrinsics for AArch32, so all those intrinsic related testcases, particularly those under the directory advsimd-intrinsics, are also appliable to AArch64. This patch set has only included those testcases that are exclusive for AArch64. --- Jiong Wang (14) ARMv8.2-A FP16 data processing intrinsics ARMv8.2-A FP16 one operand vector intrinsics ARMv8.2-A FP16 two operands vector intrinsics ARMv8.2-A FP16 three operands vector intrinsics ARMv8.2-A FP16 lane vector intrinsics ARMv8.2-A FP16 reduction vector intrinsics ARMv8.2-A FP16 one operand scalar intrinsics ARMv8.2-A FP16 two operands scalar intrinsics ARMv8.2-A FP16 three operands scalar intrinsics ARMv8.2-A FP16 lane scalar intrinsics ARMv8.2-A FP16 testsuite selector ARMv8.2-A testsuite for new data movement intrinsics ARMv8.2-A testsuite for new vector intrinsics ARMv8.2-A testsuite for new scalar intrinsics gcc/config.gcc | 2 +- gcc/config/aarch64/aarch64-builtins.c | 5 + gcc/config/aarch64/aarch64-simd-builtins.def | 161 ++++++++++++---- gcc/config/aarch64/aarch64-simd.md | 352 +++++++++++---------------- gcc/config/aarch64/aarch64.c | 16 ++ gcc/config/aarch64/aarch64.md | 161 ++++++++++------ gcc/config/aarch64/arm_fp16.h | 579 +++++++++ gcc/config/aarch64/arm_neon.h | 1380 +++++++++++++++------ gcc/config/aarch64/iterators.md | 88 +++++++-- gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/arm-neon-ref.h | 16 +- gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/unary_scalar_op.inc | 1 + gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vabdh_f16_1.c | 44 +++++ gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcageh_f16_1.c | 21 ++ gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcagth_f16_1.c | 20 ++ gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcaleh_f16_1.c | 21 ++ gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcalth_f16_1.c | 21 ++ gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vceqh_f16_1.c | 20 ++ gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vceqzh_f16_1.c | 20 ++ gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcgeh_f16_1.c | 21 ++ gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcgezh_f16_1.c | 21 ++ gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcgth_f16_1.c | 21 ++ gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcgtzh_f16_1.c | 21 ++ gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcleh_f16_1.c | 21 ++ gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vclezh_f16_1.c | 20 ++ gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vclth_f16_1.c | 21 ++ gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcltzh_f16_1.c | 20 ++ gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_s16_f16_1.c | 23 +++ gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_s64_f16_1.c | 23 +++ gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_u16_f16_1.c | 23 +++ gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_u64_f16_1.c | 23 +++ gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_s16_1.c | 25 +++ gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_s64_1.c | 25 +++ gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_u16_1.c | 25 +++ gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_u64_1.c | 25 +++ gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_s16_1.c | 46 +++++ gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_s64_1.c | 46 +++++ gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_u16_1.c | 46 +++++ gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_u64_1.c | 46 +++++ gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_s16_f16_1.c | 29 +++ gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_s64_f16_1.c | 29 +++ gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_u16_f16_1.c | 29 +++ gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_u64_f16_1.c | 29 +++ gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_s16_f16_1.c | 23 +++ gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_s64_f16_1.c | 23 +++ gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_u16_f16_1.c | 23 +++ gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_u64_f16_1.c | 23 +++ gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_s16_f16_1.c | 23 +++ gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_s64_f16_1.c | 23 +++ gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_u16_f16_1.c | 23 +++ gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_u64_f16_1.c | 23 +++ gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_s16_f16_1.c | 23 +++ gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_s64_f16_1.c | 23 +++ gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_u16_f16_1.c | 23 +++ gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_u64_f16_1.c | 23 +++ gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_s16_f16_1.c | 23 +++ gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_s64_f16_1.c | 23 +++ gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_u16_f16_1.c | 23 +++ gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_u64_f16_1.c | 23 +++ gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vdiv_f16_1.c | 86 +++++++++ gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vdup_lane.c | 119 +++++++++++- gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vduph_lane.c | 137 +++++++++++++ gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfmas_lane_f16_1.c | 908 +++++++++++++++++++ gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfmas_n_f16_1.c | 469 +++++++++++++ gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfmash_lane_f16_1.c | 143 ++++++++++++++ gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmaxh_f16_1.c | 34 ++++ gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmaxnmv_f16_1.c | 131 +++++++++++++ gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmaxv_f16_1.c | 131 +++++++++++++ gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vminh_f16_1.c | 34 ++++ gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vminnmv_f16_1.c | 131 +++++++++++++ gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vminv_f16_1.c | 131 +++++++++++++ gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmul_lane_f16_1.c | 454 ++++++++++++++++++++++ gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulh_lane_f16_1.c | 90 +++++++++ gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulx_f16_1.c | 84 ++++++++ gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulx_lane_f16_1.c | 452 +++++++++++++++++++++ gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulx_n_f16_1.c | 177 +++++++++++++++++ gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulxh_f16_1.c | 50 +++++ gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulxh_lane_f16_1.c | 91 +++++++++ gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vpminmaxnm_f16_1.c | 114 +++++++++++ gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrecpeh_f16_1.c | 42 ++++ gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrecpsh_f16_1.c | 50 +++++ gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrecpxh_f16_1.c | 32 ++++ gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndi_f16_1.c | 71 +++++++ gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrsqrteh_f16_1.c | 30 +++ gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrsqrtsh_f16_1.c | 50 +++++ gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vsqrt_f16_1.c | 72 +++++++ gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vtrn_half.c | 263 +++++++++++++++++++++++++ gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vuzp_half.c | 259 +++++++++++++++++++++++++ gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vzip_half.c | 263 +++++++++++++++++++++++++ gcc/testsuite/lib/target-supports.exp | 50 +++-- 89 files changed, 8743 insertions(+), 359 deletions(-)
