Richard Sandiford <richard.sandif...@arm.com> writes: > Matthew Fortune <matthew.fort...@imgtec.com> writes: > > Eric Botcazou <ebotca...@adacore.com> writes: > >> > Thanks for reporting. I'll take a brief look first but revert if > >> > the issue isn't something that vaguely makes sense to me. > >> > >> You need to restrict any WORD_REGISTER_OPERATIONS test to subword > >> registers. > > > > I've reverted this. I haven't been able to quickly find a change that > > I both feel is right and works. I am wondering if I actually don't > > need this change and that 'patch 3' (the change to > > simplify_operand_subreg) is the actual fix for both issues I have > seen. > > I think that patch might have a similar problem though, in that it > applies WORD_REGISTER_OPERATIONS semantics to things that might be > vectors.
There is an amendment done as part of SPARC testing that limits the change to modes that are no wider than a word. But, given that assumptions coming from WORD_REGISTER_OPERATIONS can only be applied to integer modes then it should also check both modes are MODE_INT as well. All that said... I don't entirely follow why any target should be reliant on subreg(mem) being simplified to use the outer mode. It is an optimization certainly for some cases but I don't understand what rule or guarantee we have that means reloading the inner MEM is illegal. The latter point is not appropriate to debate for GCC 7 though. Matthew
