Eric Botcazou <ebotca...@adacore.com> writes: > > Agreed. I don't think things like WORD_MODE_OPERATIONS should change > > rtl semantics, just optimisation decisions.
Sorry, I did cover two topics in one email. My point was about whether simplifying: (subreg:OUTER (mem:INNER ...)) To: (mem:OUTER ...) Should ever be a requirement for successful reloading rather than just an optimisation that 'could' be applied. There are a few cases it seems that require this simplification to happen which I find odd. > > And using the smallest > > possible spill size is often good even for RISCy targets. Yes, if (subreg(mem)) simplification only ever happened when it was reducing the size of the load/store I would understand the code more too but actually it will currently happily simplify to a wider mode. Using a wider mode may well be beneficial in other situations where a further reload would be needed due to insn constraints I guess. It all feels a bit like magic still. > I don't think that's correct, WORD_MODE_OPERATIONS does change RTL semantics > for SUBREGs smaller than a word since it can make all bits defined, even if > only the lower part is assigned. For example (SUBREG:SI (MEM:QI)) has the > higher bits defined according to LOAD_EXTEND_OP if WORD_MODE_OPERATIONS. It would almost be simpler if we had another variant of subreg (like we have strict_low_part) to explicitly represent the WORD_REGISTER_OPERATIONS behaviour with the mode change. I'll stop myself and hold this for later though! > LRA simply needs to preserve the semantics, just as reload does. I will keep working on this code post GCC 7 as the topic is bugging me now :-) Thanks, Matthew