[PATCH 05/10] i386: Use ix86_output_ssemov for DImode TYPE_SSEMOV

[H.J. Lu]

There is no need to set mode attribute to XImode since ix86_output_ssemov
can properly encode xmm16-xmm31 registers with and without AVX512VL.

gcc/

        PR target/89229
        * config/i386/i386.md (*movdi_internal): Call ix86_output_ssemov
        for TYPE_SSEMOV.  Remove ext_sse_reg_operand and TARGET_AVX512VL
        check.

gcc/testsuite/

        PR target/89229
        * gcc.target/i386/pr89229-3a.c: New test.
        * gcc.target/i386/pr89229-3b.c: Likewise.
        * gcc.target/i386/pr89229-3c.c: Likewise.
---
 gcc/config/i386/i386.md                    | 31 ++--------------------
 gcc/testsuite/gcc.target/i386/pr89229-3a.c | 17 ++++++++++++
 gcc/testsuite/gcc.target/i386/pr89229-3b.c |  6 +++++
 gcc/testsuite/gcc.target/i386/pr89229-3c.c |  7 +++++
 4 files changed, 32 insertions(+), 29 deletions(-)
 create mode 100644 gcc/testsuite/gcc.target/i386/pr89229-3a.c
 create mode 100644 gcc/testsuite/gcc.target/i386/pr89229-3b.c
 create mode 100644 gcc/testsuite/gcc.target/i386/pr89229-3c.c

diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 5607d1ecddc..03d8078e957 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -2054,31 +2054,7 @@ (define_insn "*movdi_internal"
       return standard_sse_constant_opcode (insn, operands);
 
     case TYPE_SSEMOV:
-      switch (get_attr_mode (insn))
-       {
-       case MODE_DI:
-         /* Handle broken assemblers that require movd instead of movq.  */
-         if (!HAVE_AS_IX86_INTERUNIT_MOVQ
-             && (GENERAL_REG_P (operands[0]) || GENERAL_REG_P (operands[1])))
-           return "%vmovd\t{%1, %0|%0, %1}";
-         return "%vmovq\t{%1, %0|%0, %1}";
-
-       case MODE_TI:
-         /* Handle AVX512 registers set.  */
-         if (EXT_REX_SSE_REG_P (operands[0])
-             || EXT_REX_SSE_REG_P (operands[1]))
-           return "vmovdqa64\t{%1, %0|%0, %1}";
-         return "%vmovdqa\t{%1, %0|%0, %1}";
-
-       case MODE_V2SF:
-         gcc_assert (!TARGET_AVX);
-         return "movlps\t{%1, %0|%0, %1}";
-       case MODE_V4SF:
-         return "%vmovaps\t{%1, %0|%0, %1}";
-
-       default:
-         gcc_unreachable ();
-       }
+      return ix86_output_ssemov (insn, operands);
 
     case TYPE_SSECVT:
       if (SSE_REG_P (operands[0]))
@@ -2164,10 +2140,7 @@ (define_insn "*movdi_internal"
      (cond [(eq_attr "alternative" "2")
              (const_string "SI")
            (eq_attr "alternative" "12,13")
-             (cond [(ior (match_operand 0 "ext_sse_reg_operand")
-                         (match_operand 1 "ext_sse_reg_operand"))
-                      (const_string "TI")
-                    (match_test "TARGET_AVX")
+             (cond [(match_test "TARGET_AVX")
                       (const_string "TI")
                     (ior (not (match_test "TARGET_SSE2"))
                          (match_test "optimize_function_for_size_p (cfun)"))
diff --git a/gcc/testsuite/gcc.target/i386/pr89229-3a.c 
b/gcc/testsuite/gcc.target/i386/pr89229-3a.c
new file mode 100644
index 00000000000..cb9b071e873
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr89229-3a.c
@@ -0,0 +1,17 @@
+/* { dg-do compile { target { ! ia32 } } } */
+/* { dg-options "-O2 -march=skylake-avx512 -mprefer-vector-width=512" } */
+
+extern long long i;
+
+long long
+foo1 (void)
+{
+  register long long xmm16 __asm ("xmm16") = i;
+  asm volatile ("" : "+v" (xmm16));
+  register long long xmm17 __asm ("xmm17") = xmm16;
+  asm volatile ("" : "+v" (xmm17));
+  return xmm17;
+}
+
+/* { dg-final { scan-assembler-times 
"vmovdqa64\[^\n\r]*xmm1\[67]\[^\n\r]*xmm1\[67]" 1 } } */
+/* { dg-final { scan-assembler-not "%zmm\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/i386/pr89229-3b.c 
b/gcc/testsuite/gcc.target/i386/pr89229-3b.c
new file mode 100644
index 00000000000..9265fc0354b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr89229-3b.c
@@ -0,0 +1,6 @@
+/* { dg-do compile { target { ! ia32 } } } */
+/* { dg-options "-O2 -march=skylake-avx512 -mno-avx512vl" } */
+
+#include "pr89229-3a.c"
+
+/* { dg-final { scan-assembler-times 
"vmovdqa32\[^\n\r]*zmm1\[67]\[^\n\r]*zmm1\[67]" 1 } } */
diff --git a/gcc/testsuite/gcc.target/i386/pr89229-3c.c 
b/gcc/testsuite/gcc.target/i386/pr89229-3c.c
new file mode 100644
index 00000000000..be0ca78a37e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr89229-3c.c
@@ -0,0 +1,7 @@
+/* { dg-do compile { target { ! ia32 } } } */
+/* { dg-options "-O2 -march=skylake-avx512 -mprefer-vector-width=512" } */
+
+#include "pr89229-3a.c"
+
+/* { dg-final { scan-assembler-times 
"vmovdqa64\[^\n\r]*xmm1\[67]\[^\n\r]*xmm1\[67]" 1 } } */
+/* { dg-final { scan-assembler-not "%zmm\[0-9\]+" } } */
-- 
2.24.1