From: Joe Ramsay <joe.ram...@arm.com>
Date: Thursday, 28 May 2020 at 16:19
To: Gcc-patches <gcc-patches-boun...@gcc.gnu.org>
Subject: [PATCH]: aarch64: add support for unpacked EOR, ORR and AND

Hi!

This patch improves code generation for EOR, ORR and AND on unpacked vectors 
with SVE. The following function:
void f (unsigned int *x, unsigned short *y, unsigned short *z) {
  for (int i = 0; i < 7; ++i)
    x[i] = (unsigned short) (y[i] & z[i]);
}

previously compiled to
ptrue   p1.d, vl3
ld1h    z0.d, p1/z, [x1, #1, mul vl]
ptrue   p0.b, vl32
st1h    z0.d, p0, [sp, #1, mul vl]
ld1h    z0.d, p1/z, [x2, #1, mul vl]
st1h    z0.d, p0, [sp]
ldr     x3, [x2]
ldp     x4, x2, [sp]
ldr     x1, [x1]
and     x1, x3, x1
and     x2, x2, x4
str     x2, [sp]
ld1h    z0.d, p0/z, [sp]
str     x1, [sp]
uxth    z0.s, p0/m, z0.s
st1w    z0.d, p1, [x0, #1, mul vl]
ld1h    z0.d, p0/z, [sp]
uxth    z0.s, p0/m, z0.s
st1w    z0.d, p0, [x0]
add     sp, sp, 16
ret

and now compiles to:
ptrue   p0.s, vl7
ptrue   p1.b, vl32
ld1h    z1.s, p0/z, [x1]
ld1h    z0.s, p0/z, [x2]
add     z0.h, z0.h, z1.h
uxth    z0.s, p1/m, z0.s
st1w    z0.s, p0, [x0]
ret

Tested on aarch64-linux-gnu and x86_64-linux-gnu hosts.

Thanks,
Joe



2020-05-20  Joe Ramsay  <joe.ram...@arm.com>



                    * config/aarch64/aarch64-sve.md (<LOGICAL:optab><mode>3): 
Add support for unpacked EOR, ORR, AND.



gcc/testsuite/ChangeLog



2020-05-20  Joe Ramsay  <joe.ram...@arm.com>



        * gcc.target/aarch64/sve/load_const_offset_2.c: Force using packed 
vectors.

        * gcc.target/aarch64/sve/logical_unpacked_and_1.c: New test.

        * gcc.target/aarch64/sve/logical_unpacked_and_2.c: New test.

        * gcc.target/aarch64/sve/logical_unpacked_and_3.c: New test.

        * gcc.target/aarch64/sve/logical_unpacked_and_4.c: New test.

        * gcc.target/aarch64/sve/logical_unpacked_and_5.c: New test.

        * gcc.target/aarch64/sve/logical_unpacked_and_6.c: New test.

        * gcc.target/aarch64/sve/logical_unpacked_and_7.c: New test.

        * gcc.target/aarch64/sve/logical_unpacked_eor_1.c: New test.

        * gcc.target/aarch64/sve/logical_unpacked_eor_2.c: New test.

        * gcc.target/aarch64/sve/logical_unpacked_eor_3.c: New test.

        * gcc.target/aarch64/sve/logical_unpacked_eor_4.c: New test.

        * gcc.target/aarch64/sve/logical_unpacked_eor_5.c: New test.

        * gcc.target/aarch64/sve/logical_unpacked_eor_6.c: New test.

        * gcc.target/aarch64/sve/logical_unpacked_eor_7.c: New test.

        * gcc.target/aarch64/sve/logical_unpacked_orr_1.c: New test.

        * gcc.target/aarch64/sve/logical_unpacked_orr_2.c: New test.

        * gcc.target/aarch64/sve/logical_unpacked_orr_3.c: New test.

        * gcc.target/aarch64/sve/logical_unpacked_orr_4.c: New test.

        * gcc.target/aarch64/sve/logical_unpacked_orr_5.c: New test.

        * gcc.target/aarch64/sve/logical_unpacked_orr_6.c: New test.

        * gcc.target/aarch64/sve/logical_unpacked_orr_7.c: New test.

        * gcc.target/aarch64/sve/scatter_store_6.c: Force using packed vectors.

        * gcc.target/aarch64/sve/scatter_store_7.c: Force using packed vectors.

        * gcc.target/aarch64/sve/strided_load_3.c: Force using packed vectors.

        * gcc.target/aarch64/sve/strided_store_3.c: Force using packed vectors.

        * gcc.target/aarch64/sve/unpack_signed_1.c: Force using packed vectors.


Attachment: 0001-Support-AND-ORR-EOR-on-unpacked-vectors.patch
Description: 0001-Support-AND-ORR-EOR-on-unpacked-vectors.patch

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