This patch changes the name of two functions that were added to support power9
instructions, so that the name of these functions are no longer specific to
power9.

The next patch will add support for the power10 IEEE 128-bit minimum, maximum,
and conditional move instructions.  This patch renames the support functions
that generate the appropriate instructions.

I have done bootstraps with/without these patches on a little endian power9
system and a big endian power8 system.  The big endian system has both
32/64-bit support.  There were no regressions in the patches.  Can I check this
patch into the master branch?

gcc/
2020-06-30  Michael Meissner  <meiss...@linux.ibm.com>

        * config/rs6000/rs6000.c (emit_fp_min_max_insn): Rename
        rs6000_emit_p9_fp_minmax.
        (emit_fp_cmove_with_mask_xxsel): Rename rs6000_emit_p9_fp_cmove.
        (rs6000_emit_cmove): Update to use renamed functions.
---
 gcc/config/rs6000/rs6000.c | 28 ++++++++++++++++------------
 1 file changed, 16 insertions(+), 12 deletions(-)

diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index fef7288..754431f 100644
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -14964,13 +14964,15 @@ rs6000_emit_vector_cond_expr (rtx dest, rtx op_true, 
rtx op_false,
   return 1;
 }
 
-/* ISA 3.0 (power9) minmax subcase to emit a XSMAXCDP or XSMINCDP instruction
-   for SF/DF scalars.  Move TRUE_COND to DEST if OP of the operands of the last
-   comparison is nonzero/true, FALSE_COND if it is zero/false.  Return 0 if the
-   hardware has no such operation.  */
+/* Min/max subcase to emit an appropriate instruction for SF/DF scalars on ISA
+   3.0.
+
+   Move TRUE_COND to DEST if OP of the operands of the last comparison is
+   nonzero/true, FALSE_COND if it is zero/false.  Return 0 if the hardware has
+   no such operation.  */
 
 static int
-rs6000_emit_p9_fp_minmax (rtx dest, rtx op, rtx true_cond, rtx false_cond)
+emit_fp_min_max_insn (rtx dest, rtx op, rtx true_cond, rtx false_cond)
 {
   enum rtx_code code = GET_CODE (op);
   rtx op0 = XEXP (op, 0);
@@ -15006,13 +15008,15 @@ rs6000_emit_p9_fp_minmax (rtx dest, rtx op, rtx 
true_cond, rtx false_cond)
   return 1;
 }
 
-/* ISA 3.0 (power9) conditional move subcase to emit XSCMP{EQ,GE,GT,NE}DP and
-   XXSEL instructions for SF/DF scalars.  Move TRUE_COND to DEST if OP of the
-   operands of the last comparison is nonzero/true, FALSE_COND if it is
-   zero/false.  Return 0 if the hardware has no such operation.  */
+/* Conditional move subcase to emit a floating point compare setting a mask
+   instruction and a XXSEL select instruction for SF/DF scalars on ISA 3.0.
+
+   Move TRUE_COND to DEST if OP of the operands of the last comparison is
+   nonzero/true, FALSE_COND if it is zero/false.  Return 0 if the hardware has
+   no such operation.  */
 
 static int
-rs6000_emit_p9_fp_cmove (rtx dest, rtx op, rtx true_cond, rtx false_cond)
+emit_fp_cmove_with_mask_xxsel (rtx dest, rtx op, rtx true_cond, rtx false_cond)
 {
   enum rtx_code code = GET_CODE (op);
   rtx op0 = XEXP (op, 0);
@@ -15094,10 +15098,10 @@ rs6000_emit_cmove (rtx dest, rtx op, rtx true_cond, 
rtx false_cond)
       && (compare_mode == SFmode || compare_mode == DFmode)
       && (result_mode == SFmode || result_mode == DFmode))
     {
-      if (rs6000_emit_p9_fp_minmax (dest, op, true_cond, false_cond))
+      if (emit_fp_min_max_insn (dest, op, true_cond, false_cond))
        return 1;
 
-      if (rs6000_emit_p9_fp_cmove (dest, op, true_cond, false_cond))
+      if (emit_fp_cmove_with_mask_xxsel (dest, op, true_cond, false_cond))
        return 1;
     }
 
-- 
1.8.3.1

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