LGTM :)
On Fri, Feb 24, 2023 at 7:19 PM Christoph Muellner <christoph.muell...@vrull.eu> wrote: > > From: Christoph Müllner <christoph.muell...@vrull.eu> > > This patch documents the new T-Head CPU support for RISC-V. > > Signed-off-by: Christoph Müllner <christoph.muell...@vrull.eu> > --- > htdocs/gcc-13/changes.html | 24 +++++++++++++++++++++++- > 1 file changed, 23 insertions(+), 1 deletion(-) > > diff --git a/htdocs/gcc-13/changes.html b/htdocs/gcc-13/changes.html > index a803f501..ce5ba35c 100644 > --- a/htdocs/gcc-13/changes.html > +++ b/htdocs/gcc-13/changes.html > @@ -490,7 +490,29 @@ a work-in-progress.</p> > > <h3 id="riscv">RISC-V</h3> > <ul> > - <li>New ISA extension support for zawrs.</li> > + <li>New ISA extension support for Zawrs.</li> > + <li>Support for the following vendor extensions has been added: > + <ul> > + <li>XTheadBa</li> > + <li>XTheadBb</li> > + <li>XTheadBs</li> > + <li>XTheadCmo</li> > + <li>XTheadCondMov</li> > + <li>XTheadFMemIdx</li> > + <li>XTheadFmv</li> > + <li>XTheadInt</li> > + <li>XTheadMac</li> > + <li>XTheadMemIdx</li> > + <li>XTheadMemPair</li> > + <li>XTheadSync</li> > + </ul> > + </li> > + <li>The following new CPUs are supported through the <code>-mcpu</code> > + option (GCC identifiers in parentheses). > + <ul> > + <li>T-Head's XuanTie C906 (<code>thead-c906</code>).</li> > + </ul> > + </li> > </ul> > > <!-- <h3 id="rx">RX</h3> --> > -- > 2.39.2 >
