On Fri, Sep 22, 2023 at 6:58 PM Hongyu Wang <hongyu.w...@intel.com> wrote:
>
> From: Kong Lingling <lingling.k...@intel.com>
>
> Add -mapx-features= enumeration to separate subfeatures of APX_F.
> -mapxf is treated same as previous ISA flag, while it sets
> -mapx-features=apx_all that enables all subfeatures.
Ok for this and the resest of patches(04-13).
>
> gcc/ChangeLog:
>
> * common/config/i386/cpuinfo.h (XSTATE_APX_F): New macro.
> (XCR_APX_F_ENABLED_MASK): Likewise.
> (get_available_features): Detect APX_F under
> * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_APX_F_SET): New.
> (OPTION_MASK_ISA2_APX_F_UNSET): Likewise.
> (ix86_handle_option): Handle -mapxf.
> * common/config/i386/i386-cpuinfo.h (FEATURE_APX_F): New.
> * common/config/i386/i386-isas.h: Add entry for APX_F.
> * config/i386/cpuid.h (bit_APX_F): New.
> * config/i386/i386.h (bit_APX_F): (TARGET_APX_EGPR,
> TARGET_APX_PUSH2POP2, TARGET_APX_NDD): New define.
> * config/i386/i386-opts.h (enum apx_features): New enum.
> * config/i386/i386-isa.def (APX_F): New DEF_PTA.
> * config/i386/i386-options.cc (ix86_function_specific_save):
> Save ix86_apx_features.
> (ix86_function_specific_restore): Restore it.
> (ix86_valid_target_attribute_inner_p): Add mapxf.
> (ix86_option_override_internal): Set ix86_apx_features for PTA
> and TARGET_APX_F. Also reports error when APX_F is set but not
> having TARGET_64BIT.
> * config/i386/i386.opt: (-mapxf): New ISA flag option.
> (-mapx=): New enumeration option.
> (apx_features): New enum type.
> (apx_none): New enum value.
> (apx_egpr): Likewise.
> (apx_push2pop2): Likewise.
> (apx_ndd): Likewise.
> (apx_all): Likewise.
> * doc/invoke.texi: Document mapxf.
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/i386/apx-1.c: New test.
>
> Co-authored-by: Hongyu Wang <hongyu.w...@intel.com>
> Co-authored-by: Hongtao Liu <hongtao....@intel.com>
> ---
> gcc/common/config/i386/cpuinfo.h | 12 +++++++++++-
> gcc/common/config/i386/i386-common.cc | 17 +++++++++++++++++
> gcc/common/config/i386/i386-cpuinfo.h | 1 +
> gcc/common/config/i386/i386-isas.h | 1 +
> gcc/config/i386/cpuid.h | 1 +
> gcc/config/i386/i386-isa.def | 1 +
> gcc/config/i386/i386-options.cc | 18 ++++++++++++++++++
> gcc/config/i386/i386-opts.h | 8 ++++++++
> gcc/config/i386/i386.h | 4 ++++
> gcc/config/i386/i386.opt | 25 +++++++++++++++++++++++++
> gcc/doc/invoke.texi | 11 +++++++----
> gcc/testsuite/gcc.target/i386/apx-1.c | 8 ++++++++
> 12 files changed, 102 insertions(+), 5 deletions(-)
> create mode 100644 gcc/testsuite/gcc.target/i386/apx-1.c
>
> diff --git a/gcc/common/config/i386/cpuinfo.h
> b/gcc/common/config/i386/cpuinfo.h
> index 24ae0dbf0ac..141d3743316 100644
> --- a/gcc/common/config/i386/cpuinfo.h
> +++ b/gcc/common/config/i386/cpuinfo.h
> @@ -678,6 +678,7 @@ get_available_features (struct __processor_model
> *cpu_model,
> #define XSTATE_HI_ZMM 0x80
> #define XSTATE_TILECFG 0x20000
> #define XSTATE_TILEDATA 0x40000
> +#define XSTATE_APX_F 0x80000
>
> #define XCR_AVX_ENABLED_MASK \
> (XSTATE_SSE | XSTATE_YMM)
> @@ -685,11 +686,13 @@ get_available_features (struct __processor_model
> *cpu_model,
> (XSTATE_SSE | XSTATE_YMM | XSTATE_OPMASK | XSTATE_ZMM | XSTATE_HI_ZMM)
> #define XCR_AMX_ENABLED_MASK \
> (XSTATE_TILECFG | XSTATE_TILEDATA)
> +#define XCR_APX_F_ENABLED_MASK XSTATE_APX_F
>
> - /* Check if AVX and AVX512 are usable. */
> + /* Check if AVX, AVX512 and APX are usable. */
> int avx_usable = 0;
> int avx512_usable = 0;
> int amx_usable = 0;
> + int apx_usable = 0;
> /* Check if KL is usable. */
> int has_kl = 0;
> if ((ecx & bit_OSXSAVE))
> @@ -709,6 +712,8 @@ get_available_features (struct __processor_model
> *cpu_model,
> }
> amx_usable = ((xcrlow & XCR_AMX_ENABLED_MASK)
> == XCR_AMX_ENABLED_MASK);
> + apx_usable = ((xcrlow & XCR_APX_F_ENABLED_MASK)
> + == XCR_APX_F_ENABLED_MASK);
> }
>
> #define set_feature(f) \
> @@ -922,6 +927,11 @@ get_available_features (struct __processor_model
> *cpu_model,
> if (edx & bit_AMX_COMPLEX)
> set_feature (FEATURE_AMX_COMPLEX);
> }
> + if (apx_usable)
> + {
> + if (edx & bit_APX_F)
> + set_feature (FEATURE_APX_F);
> + }
> }
> }
>
> diff --git a/gcc/common/config/i386/i386-common.cc
> b/gcc/common/config/i386/i386-common.cc
> index 95468b7c405..86596e96ad1 100644
> --- a/gcc/common/config/i386/i386-common.cc
> +++ b/gcc/common/config/i386/i386-common.cc
> @@ -123,6 +123,7 @@ along with GCC; see the file COPYING3. If not see
> #define OPTION_MASK_ISA2_SM3_SET OPTION_MASK_ISA2_SM3
> #define OPTION_MASK_ISA2_SHA512_SET OPTION_MASK_ISA2_SHA512
> #define OPTION_MASK_ISA2_SM4_SET OPTION_MASK_ISA2_SM4
> +#define OPTION_MASK_ISA2_APX_F_SET OPTION_MASK_ISA2_APX_F
>
> /* SSE4 includes both SSE4.1 and SSE4.2. -msse4 should be the same
> as -msse4.2. */
> @@ -309,6 +310,7 @@ along with GCC; see the file COPYING3. If not see
> #define OPTION_MASK_ISA2_SM3_UNSET OPTION_MASK_ISA2_SM3
> #define OPTION_MASK_ISA2_SHA512_UNSET OPTION_MASK_ISA2_SHA512
> #define OPTION_MASK_ISA2_SM4_UNSET OPTION_MASK_ISA2_SM4
> +#define OPTION_MASK_ISA2_APX_F_UNSET OPTION_MASK_ISA2_APX_F
>
> /* SSE4 includes both SSE4.1 and SSE4.2. -mno-sse4 should the same
> as -mno-sse4.1. */
> @@ -1341,6 +1343,21 @@ ix86_handle_option (struct gcc_options *opts,
> }
> return true;
>
> + case OPT_mapxf:
> + if (value)
> + {
> + opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_APX_F_SET;
> + opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA2_APX_F_SET;
> + opts->x_ix86_apx_features = apx_all;
> + }
> + else
> + {
> + opts->x_ix86_isa_flags2 &= ~OPTION_MASK_ISA2_APX_F_UNSET;
> + opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA2_APX_F_UNSET;
> + opts->x_ix86_apx_features = apx_none;
> + }
> + return true;
> +
> case OPT_mfma:
> if (value)
> {
> diff --git a/gcc/common/config/i386/i386-cpuinfo.h
> b/gcc/common/config/i386/i386-cpuinfo.h
> index 9153b4d0a54..8bf592191ab 100644
> --- a/gcc/common/config/i386/i386-cpuinfo.h
> +++ b/gcc/common/config/i386/i386-cpuinfo.h
> @@ -261,6 +261,7 @@ enum processor_features
> FEATURE_SM3,
> FEATURE_SHA512,
> FEATURE_SM4,
> + FEATURE_APX_F,
> CPU_FEATURE_MAX
> };
>
> diff --git a/gcc/common/config/i386/i386-isas.h
> b/gcc/common/config/i386/i386-isas.h
> index 2297903a45e..47e0cbd6f5b 100644
> --- a/gcc/common/config/i386/i386-isas.h
> +++ b/gcc/common/config/i386/i386-isas.h
> @@ -191,4 +191,5 @@ ISA_NAMES_TABLE_START
> ISA_NAMES_TABLE_ENTRY("sm3", FEATURE_SM3, P_NONE, "-msm3")
> ISA_NAMES_TABLE_ENTRY("sha512", FEATURE_SHA512, P_NONE, "-msha512")
> ISA_NAMES_TABLE_ENTRY("sm4", FEATURE_SM4, P_NONE, "-msm4")
> + ISA_NAMES_TABLE_ENTRY("apxf", FEATURE_APX_F, P_NONE, "-mapxf")
> ISA_NAMES_TABLE_END
> diff --git a/gcc/config/i386/cpuid.h b/gcc/config/i386/cpuid.h
> index 73c15480350..f3d3a2a1c22 100644
> --- a/gcc/config/i386/cpuid.h
> +++ b/gcc/config/i386/cpuid.h
> @@ -149,6 +149,7 @@
> #define bit_AVXNECONVERT (1 << 5)
> #define bit_AVXVNNIINT16 (1 << 10)
> #define bit_PREFETCHI (1 << 14)
> +#define bit_APX_F (1 << 21)
>
> /* Extended State Enumeration Sub-leaf (%eax == 0xd, %ecx == 1) */
> #define bit_XSAVEOPT (1 << 0)
> diff --git a/gcc/config/i386/i386-isa.def b/gcc/config/i386/i386-isa.def
> index aeafcf870ac..c581f343339 100644
> --- a/gcc/config/i386/i386-isa.def
> +++ b/gcc/config/i386/i386-isa.def
> @@ -121,3 +121,4 @@ DEF_PTA(AVXVNNIINT16)
> DEF_PTA(SM3)
> DEF_PTA(SHA512)
> DEF_PTA(SM4)
> +DEF_PTA(APX_F)
> diff --git a/gcc/config/i386/i386-options.cc b/gcc/config/i386/i386-options.cc
> index e47f9ed5d5f..b9727d5f1f3 100644
> --- a/gcc/config/i386/i386-options.cc
> +++ b/gcc/config/i386/i386-options.cc
> @@ -694,6 +694,7 @@ ix86_function_specific_save (struct cl_target_option *ptr,
> ptr->branch_cost = ix86_branch_cost;
> ptr->tune_defaulted = ix86_tune_defaulted;
> ptr->arch_specified = ix86_arch_specified;
> + ptr->x_ix86_apx_features = opts->x_ix86_apx_features;
> ptr->x_ix86_isa_flags_explicit = opts->x_ix86_isa_flags_explicit;
> ptr->x_ix86_isa_flags2_explicit = opts->x_ix86_isa_flags2_explicit;
> ptr->x_recip_mask_explicit = opts->x_recip_mask_explicit;
> @@ -832,6 +833,7 @@ ix86_function_specific_restore (struct gcc_options *opts,
> ix86_prefetch_sse = ptr->prefetch_sse;
> ix86_tune_defaulted = ptr->tune_defaulted;
> ix86_arch_specified = ptr->arch_specified;
> + opts->x_ix86_apx_features = ptr->x_ix86_apx_features;
> opts->x_ix86_isa_flags_explicit = ptr->x_ix86_isa_flags_explicit;
> opts->x_ix86_isa_flags2_explicit = ptr->x_ix86_isa_flags2_explicit;
> opts->x_recip_mask_explicit = ptr->x_recip_mask_explicit;
> @@ -1109,6 +1111,7 @@ ix86_valid_target_attribute_inner_p (tree fndecl, tree
> args, char *p_strings[],
> IX86_ATTR_ISA ("sm3", OPT_msm3),
> IX86_ATTR_ISA ("sha512", OPT_msha512),
> IX86_ATTR_ISA ("sm4", OPT_msm4),
> + IX86_ATTR_ISA ("apxf", OPT_mapxf),
>
> /* enum options */
> IX86_ATTR_ENUM ("fpmath=", OPT_mfpmath_),
> @@ -2080,6 +2083,9 @@ ix86_option_override_internal (bool main_args_p,
> opts->x_ix86_stringop_alg = no_stringop;
> }
>
> + if (TARGET_APX_F && !TARGET_64BIT)
> + error ("%<-mapxf%> is not supported for 32-bit code");
> +
> if (TARGET_UINTR && !TARGET_64BIT)
> error ("%<-muintr%> not supported for 32-bit code");
>
> @@ -2293,6 +2299,14 @@ ix86_option_override_internal (bool main_args_p,
> SET_TARGET_POPCNT (opts);
> }
>
> + /* Enable apx if apxf or apx_features are not
> + explicitly set for -march. */
> + if (TARGET_64BIT_P (opts->x_ix86_isa_flags)
> + && ((processor_alias_table[i].flags & PTA_APX_F) != 0)
> + && !TARGET_EXPLICIT_APX_F_P (opts)
> + && !OPTION_SET_P (ix86_apx_features))
> + opts->x_ix86_apx_features = apx_all;
> +
> if ((processor_alias_table[i].flags
> & (PTA_PREFETCH_SSE | PTA_SSE)) != 0)
> ix86_prefetch_sse = true;
> @@ -2444,6 +2458,10 @@ ix86_option_override_internal (bool main_args_p,
> /* Arrange to set up i386_stack_locals for all functions. */
> init_machine_status = ix86_init_machine_status;
>
> + /* Override APX flag here if ISA bit is set. */
> + if (TARGET_APX_F && !OPTION_SET_P (ix86_apx_features))
> + opts->x_ix86_apx_features = apx_all;
> +
> /* Validate -mregparm= value. */
> if (opts_set->x_ix86_regparm)
> {
> diff --git a/gcc/config/i386/i386-opts.h b/gcc/config/i386/i386-opts.h
> index be359f3e3d5..2ec76a16bce 100644
> --- a/gcc/config/i386/i386-opts.h
> +++ b/gcc/config/i386/i386-opts.h
> @@ -134,4 +134,12 @@ enum lam_type {
> lam_u57
> };
>
> +enum apx_features {
> + apx_none = 0,
> + apx_egpr = 1 << 0,
> + apx_push2pop2 = 1 << 1,
> + apx_ndd = 1 << 2,
> + apx_all = apx_egpr | apx_push2pop2 | apx_ndd,
> +};
> +
> #endif
> diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h
> index 3e8488f2ae8..8c7ed541a8f 100644
> --- a/gcc/config/i386/i386.h
> +++ b/gcc/config/i386/i386.h
> @@ -51,6 +51,10 @@ see the files COPYING3 and COPYING.RUNTIME respectively.
> If not, see
>
> #define TARGET_MMX_WITH_SSE (TARGET_64BIT && TARGET_SSE2)
>
> +#define TARGET_APX_EGPR (ix86_apx_features & apx_egpr)
> +#define TARGET_APX_PUSH2POP2 (ix86_apx_features & apx_push2pop2)
> +#define TARGET_APX_NDD (ix86_apx_features & apx_ndd)
> +
> #include "config/vxworks-dummy.h"
>
> #include "config/i386/i386-opts.h"
> diff --git a/gcc/config/i386/i386.opt b/gcc/config/i386/i386.opt
> index 78b499304a4..d89b5bbc5e8 100644
> --- a/gcc/config/i386/i386.opt
> +++ b/gcc/config/i386/i386.opt
> @@ -1310,3 +1310,28 @@ Enable vectorization for gather instruction.
> mscatter
> Target Alias(mtune-ctrl=, use_scatter, ^use_scatter)
> Enable vectorization for scatter instruction.
> +
> +mapxf
> +Target Mask(ISA2_APX_F) Var(ix86_isa_flags2) Save
> +Support APX code generation.
> +
> +mapx-features=
> +Target Undocumented Joined Enum(apx_features) EnumSet Var(ix86_apx_features)
> Init(apx_none) Save
> +
> +Enum
> +Name(apx_features) Type(int)
> +
> +EnumValue
> +Enum(apx_features) String(none) Value(apx_none) Set(1)
> +
> +EnumValue
> +Enum(apx_features) String(egpr) Value(apx_egpr) Set(2)
> +
> +EnumValue
> +Enum(apx_features) String(push2pop2) Value(apx_push2pop2) Set(3)
> +
> +EnumValue
> +Enum(apx_features) String(ndd) Value(apx_ndd) Set(4)
> +
> +EnumValue
> +Enum(apx_features) String(all) Value(apx_all) Set(1)
> diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
> index ba7984bcb7e..afe6b321b14 100644
> --- a/gcc/doc/invoke.texi
> +++ b/gcc/doc/invoke.texi
> @@ -1443,7 +1443,7 @@ See RS/6000 and PowerPC Options.
> -mrdseed -msgx -mavx512vp2intersect -mserialize -mtsxldtrk
> -mamx-tile -mamx-int8 -mamx-bf16 -muintr -mhreset -mavxvnni
> -mavx512fp16 -mavxifma -mavxvnniint8 -mavxneconvert -mcmpccxadd -mamx-fp16
> --mprefetchi -mraoint -mamx-complex -mavxvnniint16 -msm3 -msha512 -msm4
> +-mprefetchi -mraoint -mamx-complex -mavxvnniint16 -msm3 -msha512 -msm4 -mapxf
> -mcldemote -mms-bitfields -mno-align-stringops -minline-all-stringops
> -minline-stringops-dynamically -mstringop-strategy=@var{alg}
> -mkl -mwidekl
> @@ -33802,6 +33802,9 @@ preferred alignment to
> @option{-mpreferred-stack-boundary=2}.
> @need 200
> @opindex msm4
> @itemx -msm4
> +@need 200
> +@opindex mapxf
> +@itemx -mapxf
> These switches enable the use of instructions in the MMX, SSE,
> AVX512ER, AVX512CD, AVX512VL, AVX512BW, AVX512DQ, AVX512IFMA, AVX512VBMI,
> SHA,
> AES, PCLMUL, CLFLUSHOPT, CLWB, FSGSBASE, PTWRITE, RDRND, F16C, FMA, PCONFIG,
> @@ -33812,9 +33815,9 @@ GFNI, VAES, WAITPKG, VPCLMULQDQ, AVX512BITALG,
> MOVDIRI, MOVDIR64B, AVX512BF16,
> ENQCMD, AVX512VPOPCNTDQ, AVX5124FMAPS, AVX512VNNI, AVX5124VNNIW, SERIALIZE,
> UINTR, HRESET, AMXTILE, AMXINT8, AMXBF16, KL, WIDEKL, AVXVNNI, AVX512-FP16,
> AVXIFMA, AVXVNNIINT8, AVXNECONVERT, CMPCCXADD, AMX-FP16, PREFETCHI, RAOINT,
> -AMX-COMPLEX, AVXVNNIINT16, SM3, SHA512, SM4 or CLDEMOTE extended instruction
> -sets. Each has a corresponding @option{-mno-} option to disable use of these
> -instructions.
> +AMX-COMPLEX, AVXVNNIINT16, SM3, SHA512, SM4, APX_F or CLDEMOTE extended
> +instruction sets. Each has a corresponding @option{-mno-} option to disable
> +use of these instructions.
>
> These extensions are also available as built-in functions: see
> @ref{x86 Built-in Functions}, for details of the functions enabled and
> diff --git a/gcc/testsuite/gcc.target/i386/apx-1.c
> b/gcc/testsuite/gcc.target/i386/apx-1.c
> new file mode 100644
> index 00000000000..4e580ecdf37
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/i386/apx-1.c
> @@ -0,0 +1,8 @@
> +/* { dg-do compile } */
> +/* { dg-options "-O2 -mapxf" } */
> +/* { dg-error "'-mapxf' is not supported for 32-bit code" "" { target ia32 }
> 0 } */
> +
> +void
> +apx_hanlder ()
> +{
> +}
> --
> 2.31.1
>
--
BR,
Hongtao
