Hi,
I noticed I had missed one of the preparatory patches at the start of
this series (first one) added now, also removed the 'vect: Add
vector_mode paramater to simd_clone_usable' since after review we no
longer deemed it necessary. And replaced the old vect: Add
TARGET_SIMD_CLONE_ADJUST_RET_OR_PARAM with omp: Reorder call for
TARGET_SIMD_CLONE_ADJUST after comments.
Bootstrapped and regression tested the series on
aarch64-unknown-linux-gnu and x86_64-pc-linux-gnu.
Andre Vieira (8):
omp: Replace simd_clone_supbarts with TYPE_VECTOR_SUBPARTS [NEW]
parloops: Copy target and optimizations when creating a function clone
[Reviewed]
parloops: Allow poly nit and bound [Cond Reviewed, made the requested
changes]
vect: Fix vect_get_smallest_scalar_type for simd clones [First Reviewe,
made the requested changes, OK?]
vect: don't allow fully masked loops with non-masked simd clones [PR
110485] [Reviewed]
vect: Use inbranch simdclones in masked loops [Needs review]
vect: omp: Reorder call for TARGET_SIMD_CLONE_ADJUST [NEW]
aarch64: Add SVE support for simd clones [PR 96342] [Needs review]
PS: apologies for the inconsistent numbering of the emails, things got a
bit confusing with removing and adding patches to the series.
On 30/08/2023 09:49, Andre Vieira (lists) via Gcc-patches wrote:
Hi,
This patch series aims to implement support for SVE simd clones when not
specifying a 'simdlen' clause for AArch64. This patch depends on my
earlier patch: '[PATCH] aarch64: enable mixed-types for aarch64
simdclones'.
Bootstrapped and regression tested the series on
aarch64-unknown-linux-gnu and x86_64-pc-linux-gnu. I also tried building
the patches separately, but that was before some further clean-up
restructuring, so will do that again prior to pushing.
Andre Vieira (8):
parloops: Copy target and optimizations when creating a function clone
parloops: Allow poly nit and bound
vect: Fix vect_get_smallest_scalar_type for simd clones
vect: don't allow fully masked loops with non-masked simd clones [PR
110485]
vect: Use inbranch simdclones in masked loops
vect: Add vector_mode paramater to simd_clone_usable
vect: Add TARGET_SIMD_CLONE_ADJUST_RET_OR_PARAM
aarch64: Add SVE support for simd clones [PR 96342]
